Millisecond annealing: extendible to 20nm and beyond
Ultratech, Inc., San Jose, CA USA
Thermal processing has always played a critical role in the fabrications in ICs, serving many purposes such as dopant activation, dopant diffusion, and silicide formation. Historically, the shrinking of device dimensions has demanded that more advanced equipment be developed that can deliver thermal profiles with higher temperatures and shorter processing times. The most recent advancement in thermal processing equipment is millisecond annealing (MSA), where the wafer is typically brought to temperatures about 100-200°C below the melting point of silicon for 100s of microseconds to several milliseconds. The high temperatures and short times of the anneal provide high dopant activation with minimal diffusion, which enables significantly faster, more scalable transistors. Today, MSA is considered mainstream in logic manufacturing for 45nm and below for ultra shallow junction formation, often used for multiple steps in the process flow. To extend MSA to 20nm and beyond, there are challenges in both device integration and the manufacturing process.
At the 45 through 28nm nodes, IC manufacturers generally form the junction using a combination of spike rapid thermal processing (RTP) and MSA. The RTP step causes some dopant diffusion, and also anneals out end-of-range (EOR) defects caused by ion implantation. The MSA step increases the activation of the dopants to lower the series resistance of the transistor. However, at sub-28nm nodes, the current approach of low temperature RTP combined with MSA may cause too much dopant diffusion and lead to short channel effects. But a standard MSA step alone is not long enough to anneal out the EOR defects. To address this scaling problem, MSA equipment suppliers have redesigned their hardware to enable annealing on a timescale on the order of 10msec, an order of magnitude greater than standard MSA. In this time regime, it has been shown that the EOR defects can be healed, and there is very little diffusion so short channel effects can be managed. Some MSA equipment designs can effectively combine two anneals in the same process – one anneal on the order of 10msec to anneal EOR defects, and a higher temperature anneal on the order of 100s of µsec to further lower series resistance.
MSA can also enable device scaling for nickel silicidation for advanced logic devices. The conventional way of forming nickel silicide is using a two-step low temperature RTP process. As devices shrink, nickel diffusion during the second RTP step can cause "nickel piping," which causes junction leakage and yield loss. It has been shown that replacing the second RTP step with a low temperature MSA step (< 1000°C) can reduce or eliminate this defect and drastically lower junction leakage. To address this new application, some MSA suppliers have adapted their hardware for low temperature anneals, including low temperature measurement and control capability to ensure a robust process window. This low temperature capability could also enable other middle-of-line or back-end-of-line applications in future nodes.
One major manufacturing challenge that will persist through 20nm and beyond is pattern effects, where non-uniformity of device patterns cause within-die temperature non-uniformity and yield loss. Pattern effects are currently being addressed in three ways: 1) make the system design insensitive to pattern effects, 2) use an absorber layer, or 3) make "dummy" patterns on the wafer. Although each method has different implications for manufacturing cost, all three appear to be extendible to 20nm and beyond. A second critical manufacturing issue is managing MSA-induced stress and wafer warpage, which can lead to lithographic overlay errors and stress-induced leakage. MSA manufacturers are addressing these problems in one or both of the following ways: 1) reducing the annealing time, and/or 2) adding a preheat step to lower stress during transient. Tool flexibility will be the key to ensuring that this issue does not become a showstopper at sub-28nm nodes.
Sub-melt millisecond annealing will almost certainly play a critical role in meeting the cost and technology challenges of manufacturing devices at 20nm and beyond. It is critical that MSA suppliers work closely with IC manufacturers to expand the capabilities of MSA equipment.
Jeff Hebb is VP of Laser Product Marketing at Ultratech, Inc., San Jose, CA; Contact info: firstname.lastname@example.org