Five takeaways from TSMC's 450mm pledge


TSMC chief exec Morris Chang had some surprisingly candid and bullish projections about a 450mm wafer-size transition during the company's recent 4Q10 quarterly results call: Readying a 20nm pilot line at its Fab 12 Phase VI by 2013-14, and ramping to volume production by 2015-16. We asked a few industry analysts what they thought of TSMC's statement, and they generally agreed on several key interpretations:

Don't bet on it—or against it. That newly stated timeline (2013-14 pilot production, 2015-16 production ramp) is basically aligned with what's still on the 2010 ITRS Roadmap (unchanged from the 2009 version), though an anticipated ITRS reevaluation later this year might officially push things back a little. The silence (so far) from the other original two 450mm proponents, Intel and Samsung, also suggests the original proposed schedule of a 2012 pilot line has slipped. "Very early pilot production by 2014 is probably doable, and I think the first true volume-production-sized fabs have to be 2.5-3 years away from that," said IC Insights' Trevor Yancey.

It won't be as hard as 300mm. 300mm wafer processing didn't really get into gear until TSMC announced a real fab, said VLSI Research's Dan Hutcheson, and even then there were delays—e.g., a lack of automation standards. But because those are now in place, the real technical hurdles to a 450mm transition are tool availability and process development, so "it should go smoother than 300mm," he wrote.

The real problems aren't technical, they're economic. Developing the infrastructure to support a 450mm wafer-size transition will be tough, but it's not the real challenge—it's a matter of delivering the required economic payback.

"You have to be able to drop the cost of producing a square inch of silicon by at least 30% to make it worthwhile," said Bob Johnson, research VP at Gartner. That'll basically mean getting the same throughput (wafers/hour) at 450mm as at 300mm. And that means overcoming hurdles in area-sensitive processes such as lithography, implant, and inspection. Scan/step will need to be 2.25× faster to maintain equal throughput, or else add more stages and associated components (e.g. optics and lasers) which will drive up tool costs. And don't forget about EUV lithography, which still has serious throughput issues but is also on the development path parallel to (and eventually intersecting with) 450mm wafer processing.

Without economic justification—and that includes satisfying toolmakers' desire for return on their R&D investments—volume production for 450mm won't happen, Johnson said.

It's when, not if. Tool suppliers have publicly bellyached from the first suggestions of 450mm about needing devicemakers to help support development (if not bear it largely/entirely), as well as clear targets to revenue generation. They still remember the switchover to 300mm which took years longer than expected, and with debatable ROI to suppliers. Nevertheless, the industry has been pushing ahead with developing a 450mm infrastructure, and a lot of suppliers are at least working behind the scenes with their customers. "There is definitely progress being made in developing
the technology, and there seems to be greater cooperation across the industry than was experience with 300mm development," said Yancey. "Most equipment/materials suppliers are developing technology and/or participating in the co-ops whether they will admit it or not." It's the same argument that devicemakers face whether to get off the leading-edge process train—if you're not supplying 450mm tools, you're dead in the market. "If you are an equipment supplier, it means you can no longer ignore 450mm," asserted Hutcheson.

If TSMC goes, everyone goes. Intel carried the industry's wafer-size transition torch at 150mm, and IBM did it at 200mm. TSMC was an early catalyst at what generally was an industry-supported 300mm transition. Maybe the top foundry is willing to "be the one with the arrows in their back" and take a leadership role at 450mm, noted Hutcheson. Gartner's Johnson agreed: "It will have to provide a big check to a few tool suppliers to fund 450mm, and also to fund the first pilot line to see if they can get the costs down," which is probably what Intel and others would prefer to see before committing. "If that happens, then it will get interesting."

Every chipmaker planning a fab must now decide whether TSMC means to stick to that timeline, and prepare their own responses. "You can't be a fast follower with wafer size transitions because fabs have such long lives," said Hutcheson, noting how Japan gambled at 200mm and got passed by Taiwan and Korea. (Nor can one develop a leading-edge process and simply port it to new wafer size, he pointed out, recalling TI in the mid-90s.)

Bottom line: Look for other big chipmakers to quickly crystallize their 450mm strategies, starting with Samsung and GlobalFoundries. Intel's soon-to-come new development fab, D1X, will apparently be 450mm-capable at some point, so the chipmaker likely would officially join the movement too. — J.M.

Solid State Technology | Volume 54 | Issue 3 | March 2011

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