300mm Prime and the prospect for 450mm wafers


Executive OVERVIEW

For five decades, the semiconductor industry has been delivering continuous improvement in the performance of semiconductor devices while simultaneously reducing prices. The open market price for a million bits of DRAM memory and the price for a million instructions per second of microprocessor performance have both been reduced by an average of ~35% per year since they were introduced in 1970 [1]. Recently, the NAND Flash prices per million bits have been reduced at an even faster rate of ~64% per year [1]. For semiconductor companies to succeed or even survive in such an aggressive environment, rapid continuous improvement in costs is essential. This article discusses the cost savings that could be realized by the industry moving to 450mm wafer manufacturing.

Scotten W. Jones, IC Knowledge LLC, Georgetown, MA USA

The semiconductor industry has been able to deliver rapid price reductions by combining several factors to reduce costs:

• Yields were once low across much of the industry, but today routinely exceed 90% for even the most complex products within the first 12 months after their introduction to the market.

• Linewidth shrinks of 30% reduce die area by 50% and cost by ~40%. Whereas linewidth shrinks were once every three years, the last several generations have been on a two-year timeline, further accelerating cost reductions.

• Increases in wafer size, such as the 200mm to 300mm transition, increase wafer area by 2.25x and decrease costs by ~30%.

• Improvements in other factors, such as the operating efficiency of equipment, also contribute.

These four factors have, to date, been sufficient to maintain gross margins in the industry, but now and in the near future, some of these factors will show a reduced effect on cost reduction. Yields are now so high and reach such a high level so quickly that further improvement will have only minimal effect on cost reduction. This is not to say that yield isn't important; it is, but there is less room for future improvement. Linewidth reductions should continue on a two-year cycle for a few more generations, but will then begin to approach physical limits—slowing and eventually stopping.

There are also questions concerning the economics of future lithography solutions, such as extreme ultraviolet (EUV) needed to keep shrinking linewidth. Wafer size transitions have slowed, and many have openly questioned whether the industry will ever make the transition to 450mm wafers. It has been estimated that the semiconductor equipment industry spent $11.6 billion dollars developing 300mm tools [2]—an investment that it is still struggling to recoup. With 450mm tool development costs estimated to cost $25 billion [2] and most equipment companies losing money, reluctance to engage in another wafer size transition is easy to understand.

300mm Prime

300mm Prime is an ISMI initiative to improve efficiency of 300mm equipment and maintain historical cost reduction rates without resorting to a 450mm wafer transition. In 1995, sematech studied the overall equipment effectiveness (OEE) of 350nm and larger linewidth equipment, and found that the equipment was producing good useable product only 30% of the time [3]. The remaining 70% of the time was lost to down time, no product or operator being available, speed, scrap, test wafers, set up, and other factors.

Even as late as 2003, sematech still found OEE was only 40% [4]. Clearly, there is great opportunity for improvement in equipment productivity. This is, in fact, the key reason why 300mm equipment is designed to accommodate two-input FOUPs at once—as one FOUP is emptied, a second one is ready, and product is always available for processing. To date, 300mm Prime has made progress but has not been able to meet the goals outlined for the program of a 50% cycle time reduction and 30% cost reduction [5]. In fact, no one has yet been able to outline a path to reach the 300mm Prime goals, leaving the eventual need to transition to 450mm wafers on the table.

450mm considerations

For 450mm to ever become a reality, the industry needs to be convinced that 450mm wafers will, in fact, deliver a sufficient cost reduction to justify the development cost, and then some kind of partnership will need to be established between semiconductor manufacturers and equipment companies to fund the development. IC Knowledge produces a widely used IC Cost Model in the industry [6], and here, we present some simulations of 450mm wafer costs that use our commercial tool to look at possible cost savings.

For this study, we have chosen to model Intel microprocessors and Samsung NAND Flash, and have modeled 22nm processing in a plant built in 2014. To calculate 450mm wafer processing costs relative to 300mm, we have to project equipment costs and throughput differences, as well as materials usage and cost trends. We have assumed 450mm equipment will have similar throughput to 300mm equipment and cost 1.3x times as much. This assumption is consistent with the 200mm to 300mm transition.

We have forecasted 450mm wafer costs based on an initially higher cost per square centimeter cost due to scrap issues that, over time, will slowly approach the cost per square centimeter cost seen for 300mm. This trend is consistent with the last several wafer size transitions (Table 1).

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The results in Table 1 suggest that 450mm delivers cost reductions are consistent with past wafer transitions and so would be beneficial to semiconductor manufacturers. Higher initial material costs for 450mm reduce cost saving in the first few years after the wafer size is introduced, so that in later years, cost savings would be even higher on a percentage basis.

The capital efficiency challenge

We estimate that the cost to build and equip a 300mm fab is only 60% of the cost of building and equipping a 200mm fab with the same die output. At the same time that 300mm was ramping up, the semiconductor industry was transitioning from ~15% per year revenue growth to the ~4% per year currently seen. We believe this represents a maturing of the industry and is likely to continue for the foreseeable future.

Combining lower semiconductor market growth with improved capital efficiency has resulted in a capital equipment market that we expect to be essentially flat from 2000 to at least 2015 [1]. If 450mm equipment delivers a capital efficiency improvement equivalent to 300mm tools, we are hard pressed to see how the equipment industry survives. This is an area that will have to be addressed for 450mm tools to be developed.

A couple of recently published articles on 450mm contain statements we disagree with and wanted to examine further:

In "Contemplating 450mm," Daren Dance and David Jimenez of Wright, Williams and Kelly Inc., present some of their own cost modeling and conclude that 450mm wafers will be more expensive per square centimeter than 300mm wafers [7]. The largest segment of their costs is depreciation, so we decided to examine that result more closely. Reading off of their graph, we get ~$4.20/cm2 for depreciation at 300mm, and $6.50/cm2 for 450mm. If you consider that there are 2.25 times as many cm2 in a 450mm wafer, their projection implies that the 450mm tool set will be 3.5 times as expensive as a 300mm tool set. With an assumption such as that, of course, the cost goes up.

At 300mm, toolset costs averaged ~1.3 times the cost of equivalent 200mm tools. There has been some commentary suggesting that at 450mm, the cost multiple may be higher than 1.3x and that the throughput may be lower, but a 3.5x cost increase strikes us as extreme. We would also argue that the increases Dance and Jimenez project for maintenance, and the flat process materials cost per square centimeters, are also pessimistic.

In "What Are the Alternatives to 450mm Wafers?," Jason Ignizio makes the statement that if the increases in cycle time seen from 200mm to 300mm wafers is repeated at 450mm, cycle time efficiency will decline [8]. The increase in cycle time seen at 300mm is the direct result of a design decision made by the industry standards committee to design tools to accept multiple input cassettes maximizing utilization as discussed above. Multiple input cassettes basically ensures that no tool runs dry of wafers, but also increases the wafers waiting in queue driving up cycle time. Unless some other cycle time-utilization trade-off decision is made at 450mm to maximize utilization, then 450mm cycle time should not be intrinsically worse than 300mm cycle time (unless tool throughput is significantly lower).


The 300mm Prime effort to-date has failed to achieve the program goals of a 50% cycle time reduction and 30% cost reduction. Simulations suggest that 450mm manufacturing is able to at least deliver close to a 30% cost reduction. Additionally, as material costs come down with learning, 450mm cost savings should get better.


Scotten W. Jones received his Bachelors of Science from the U. of Rhode Island, and is a senior member of the IEEE, a member of the Electrochemical Society, and is president of IC Knowledge LLC, P.O. Box 20, Georgetown, MA 01833 USA; 978-352-7610;;


1. S. W. Jones, "2009 IC Economics Report," IC Knowledge LLC (2009).

2. VLSI Research and IC Knowledge estimates.

3. B. Rowe, "Capital Productivity Challenge and Opportunity," ASMC (1995).

4. P. Singer, "E-Manufacturing: The Evolution Continues," SEMATECH data, Semicon. Internat. July (2003).

5. D. Fandel, R. Wright, "300mm Productivity Detractors Mitigation Cost Analysis," ASMC (2008).

6. 2009 IC Cost Model revision 0907 unreleased.

7. D. Dance, D. Jimenez, "Contemplating 450mm," Future Fab 25 (2008).

8. J. Ignizio, "What Are the Alternatives to 450mm Wafers?" ibid

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