SEMI: Fab investments poised for a comeback
Fab spending has been sliding since early 2008 and is poised to sink to a 10-year low in 2009, according to recent data and projections from SEMI???but the good news is that 2010 could see a 90% surge in fab investments.
After tailing off as early as 1Q08, investments in frontend facilities (construction and equipment) quickly fell through the floor, according to SEMI; the group pegs a projected -51% decline for all of 2009 vs. 2008, and the pace of facilities closures will nearly double (35 vs. 19). Worldwide capacity will decline about 3% overall to 15M wafers/month (200mm equivalent), and twice that rate of decline (-5% to -7%) for the much-maligned memory sector.
Investments in front-end facilities, construction + equipping. (Source: SEMI World Fab Database)
However, looking at the quarterly picture, we could now be at the bottom of the trough. SEMI anticipates investments in fab projects and equipment will ramp up in 2H09 and into 2010, and through 2010 fab investments could be nearly double (+90%) anticipated levels for this year. Activity in the Americas is notable, mainly thanks to Intel’s 32nm ramp (now ongoing) and GlobalFoundries proposed fab in Malta, NY (construction starting in mid-2009). Also note the total evaporation of investments in Asia, particularly Taiwan and Korea (which are heavily memory).
Several new fabs are expected to begin construction in 2009, according to a related report from Christian Gregor Dieseldorff of SEMI Industry Research and Statistics???three in Europe/Mideast/Russia, and two in the Americas, including GlobalFoundries which is the lone high-volume fab. As many as nine facilities will also commence operations (spanning the Americas, China, Japan, Taiwan, and Europe/Middle East); six are 150mm and below, with three 200mm and a single 300mm fab. Also, three of this group are foundries, two are at universities, and the rest are for MEMS/discretes.
After a -34% plunge in silicon wafer demand in 1Q09, demand spiked ~50% in 2Q as suppliers quickly rebuilt inventories they slashed earlier back to normal levels, according to Gartner???but the firm’s still wary of broader demand for device production until after 3Q09.
Toshiba and NEC are deepening ties with the IBM-led Common Platform Alliance to high-k/metal gate LSI at the 28nm node.
Suss MicroTec and 3M are partnering to configure their technologies for temporary bonding of ultrathin wafers for 3D packaging.
Wolfgang Mueller, who spearheaded development of Qimonda’s “buried wordline” and 4F(2) bit cell DRAM technologies, has been hired by Z-RAM memory firm Innovative Silicon Inc. (ISi) to work on their sub-40nm process technologies.
Applied Materials has handed over most of its stake in Sokudo, its coating/development track tool JV, to partner Dainippon Screen.
Novellus says it has developed dense ultralow-k materials for 32nm integration, with 5% lower keff combined with the company’s diffusion barrier layers.
GlobalFoundries has hired two ex-Applied Materials and AMD execs to head up its Fab 2 in upstate New York. It also has demonstrated a technique that allows equivalent oxide thickness (EOT) in a HK+MG transistor to scale beyond the level required for the 22nm node.
Cadence Design Systems says it is laying off about 5% of its workforce and reducing investments in what it calls “the manufacturing side” of design-for-manufacturing (DFM).
Nanometrics has purchased inventory and other assets of Zygo’s chip tool business, notably its Unifire line of products.
RF Micro Devices has formed a gallium nitride (GaN) foundry services business unit, targeting “multiple RF power markets.”
Aviza Technology has filed a voluntary Chapter 11, and will sell some assets to Sumitomo Precision Products.
Toshiba has devised a gate stack with an added strontium germanium interlayer to achieve the high carrier mobility required for 16nm LSIs. The company also reportedly has a new simulation tool that helps boost 40nm chip yields.
TSMC has reappointed chairman Morris Chang as CEO, to help push outside the semiconductor world into LEDs and solar energy.
Local reports quote Intel execs indicate the chipmaker’s 300mm fab in Dalian, China, will open in 2010 using 65nm process technologies.
AU Optronics plans to purchase a majority stake in Japanese poly-Si supplier M.Setek.
UMC shareholders have given the green-light to the foundry’s proposed $285M takeover of mainland partner HeJian Technology (Suzhou).
Citing sluggish demand, Panasonic is mulling a delay in opening its new ¥94B image sensor chip plant in Toyama Prefecture, which it announced in Jan. 2008. Meanwhile, Toshiba reportedly will convert its Kitakyushu plant to optical device production, possibly with new equipment investments.
Dai Nippon Printing says it has designed a lead frame for that uses only a third the normal amount of gold wire, and reduces chip package costs by around 40%.
Yingli Green Energy, Tempress Systems, and the Energy Research Centre of the Netherlands are forming a research collaboration to develop high-efficiency N-type silicon solar cells.
Peter Wolters has devised new sensor and process control capabilities for its double-sided wafer polishing systems that meet 22nm lithography requirements.
Soitec says its 300mm ultra-thin SOI wafer platform is qualified and ready to support the 22nm node and beyond.
ASMI is divesting its Levitor rapid thermal processing (RTP) business in a management buyout, but will hold a minority stake.
X-Fab is offering its first foundry process for Hall sensors in 0.18??m process technology.
Alchimer says its improved eG ViaCoat wet deposition process for copper (Cu) seed TSV provides up to 80% cost savings versus dry vacuum processes.