Electronics Interconnections for Extreme Environments
BY GEORGE G. HARMAN
In January 2004, NASA landed two rovers named Spirit and Opportunity on Mars to explore the surface and gather geologic information to beam back to Earth. The environment, however, is so extreme that the rovers are equipped with heaters to keep the electronic gear warm enough to operate properly over the Martian winter when temperatures dip down to –120°C.
Special requirements are necessary for wire bond and flip chip interconnections used in packaging semiconductor devices for extreme high- and low-temperature environments — from 460°C (high-temperature environment) down to –200°C (low-temperature environment). Active devices capable of operating in these conditions are needed for future space-probe operations on other solar system planets, deep well logging, geothermal measurements, sensors near rocket and jet engines, etc. (Figure 1).
Wire Bond Interconnections
The most commonly used Au-Al wire bonds should be avoided in the high-temperature environment range, along with any other metallurgical interfaces that form brittle intermetallics and or Kirkendall voids. Gold-to-gold bonds improve with time and temperature (Figure 2). Therefore, the clear preference is for gold or other noble metals in the high-temperature environment for wire and flip chip bonds.
Figure 1. Solar system planetary temperature ranges that may be encountered by future space probes. Courtesy of J. Patel, JPL/NASA.
Normal gold wire bonds (ball and wedge) to gold chip pads are excellent in this application. Conventional interconnections, such as Au-Al wire bonds, are acceptable for the low-temperature environments and intermediate temperature ranges found on Mars. Also, fatigue damage to wires can occur during large temperature/power cycling in both high- and low-temperature environments. For example, chips on Mars can be exposed to temperatures ranging from –120° to 85°C; on Jupiter, they can range from –140° to >380°C. On Earth, well logging and some military and sensor applications can reach similar ranges. Wire diameter, loop shape, height and metallurgy determine the fatigue susceptibility and life. In high-temperature environments, the current carrying capacity of wire bonds must be appropriately derated to avoid burnout.
Flip Chip Interconnections
For high-frequency use, systems may require flip chip interconnections. However, normal soft solder-based flip chips cannot be used in high-temperature environments. Instead, gold can be used in place of solder-ball flip chip interconnections. Flip chips can be ball bumped/stud bumped with gold for high-temperature environments and then thermo-compression bonded to gold pads on the substrate. For low-temperature environments, normal soft solder-based flip chip bumps can be used, without plastic underfill, because of the plastic coefficient of thermal expansion (CTE) mismatch at very low temperatures, which could damage the chip or cause it to separate at an interface. For both extreme environments, substrate-and-chip CTE matching is absolutely essential if temperature cycling is expected (and it usually does occur).
Liquid H2O does not exist in either extreme environment. Therefore, electro/chemical corrosion of interconnections is unlikely. However, all such devices are built, qualified and stored in normal Earth environments where water and impurities are plentiful and corrosive processes could be initiated, so they must be packaged using the best high-rel procedures. Devices intended for operation in low-temperature environments typically use normal aluminum-metallization on Si (or possibly SiGe) chips and gold or aluminum wire bonds. These are susceptible to corrosion when they cycle through the liquid water (corrosion) range at various times during the device/system life. On Mars, the effective temperature range of semiconductor devices can vary from –120° to 85°C (latter includes chip self heating). Similar ranges may be encountered in some Earth polar regions. Thus, appropriate hermetic precautions are required.
Figure 2. Temperature/time increases the strength of contaminated Au-Au bonds. Courtesy of Jellison.
Potential failure of the metal adhesion layer between gold metallization and ceramic substrates, as well as any diffusion barriers under/over the chip metallization, must be considered in design and testing for high-temperature environments. Reliability problems from creep or cracking of normal glass-metal seals in hermetic packages can cause failure during temperature cycling in high-temperature environments and hysteresis in low-temperature environments. Use of ceramic-metal seals is preferred.
Chips used for high-temperature environments are not conventional Si-based ones. Most likely, they will be SiC, or possibly GaAs or GaN. These devices should have gold metallization and bond pads. In all cases, the die attach must be metallurgical (gold) rather than polymer/epoxy as used for Earth temperature-range devices.
Some new, high-temperature polymers, such as those developed for the recent copper low-k chips, can be considered in future extreme environments in cases where flex-circuits are desired. Several of these polymers can be used above 400°C; however, they may require considerable development for high-temperature environments.
GEORGE HARMAN, NIST Fellow-SE, may be contacted at NIST, Semiconductor Electronics Division, Gaithersburg, MD 20899; e-mail: firstname.lastname@example.org.
This article is summarized from a presentation at the "Workshop on Extreme Environment Technologies for Space Exploration," sponsored by JPL in May 2003.
1. G.G. Harman, "Wire Bonding in Microelectronics," 2nd ed., New York, NY: McGraw Hill, 1997.