RFID Chip Assembly for 0.1 Cent?
Future possibilities for RFID development
BY HUGO PRISTAUZ
While the world is arguing over the “nickel tag” - a fully functional, passive RFID transponder - and whether it could be on the market by 2008, the suppliers of back-end equipment are aggressively pursuing various technology avenues to decrease manufacturing costs for ubiquitous RFID tags.
Smart RFID Assembly Line: Aggressively Driving Down Cost
The possibilities of the RFID are limitless. Technical analysis shows broad-based applications of RFID will develop in two distinct phases. Phase 1, which we are in now, shows only marginal advances because RFID is superficially tacked on to existing business processes. Phase 2 will offer a revolutionary change after radical process re-engineering and new RFID-centered business models emerge. This phase will unlock the full potential of RFID, turning it into a base technology. Analysts say that the industry should dedicate creative resources to advancing manufacturing technologies for RFID production.
Nevertheless - price is the significant benchmark for RFID tag acceptance into broad-based markets. In 2003, the average price point of RFID tags was ten times the projected 5¢ per unit price, but now there is evidence of a new wave of technology enablers that will drive down the production cost.
Chip Assembly at 0.1¢ Per Bond
Analysts predict that by 2007, there will be low cost chip assembly solutions available to drive down chip-assembly cost to 0.1¢ per bond. Applied to a 5¢ tag, chip assembly cost would be 2% of the final price - excluding the cost of operators, a manufacturing site, and overhead, which, in a high-volume production, should be capped at an additional 3¢ per tag.
Low cost RFID assembly lines are in operation at customers’ high-volume RFID manufacturing sites - producing RFID tags at a throughput of 10,000 units per hour (UPH) per line. With three daily work shifts, 5-year depreciation, and appropriate uptime conditions, these manufacturers will enjoy starting costs of 0.2¢ per line. Ongoing R&D activities predict this performance to double over the next 2 years.
RFID Assembly Methods
In the manufacturing of RFID tags, there is a basic distinction: direct chip assembly and indirect chip assembly. Direct assembly has chip bumps positioned and placed directly onto the antenna connections by means of flip chip technology. The key advantage is lower packaging cost as fewer steps and less material is required. However, despite the large antenna pitch, high throughput rates necessitate short indexing times. Thus, the technology has its challenges, which will be more manageable the substrate widens. However, the tradeoff is longer chip transport time. A well-balanced substrate width will result in a successful machine concept.
Alternatively, various manufacturers use indirect RFID chip assembly. This two-step process first introduces a flip chip interposer. Next, at high throughput and low cost of ownership, the interposer is mounted on the antenna by crimping. Indirect assembly is especially advantageous for manufacturers inexperienced with bare-chip processing. Investment cost for the follow-up assembly step is lower. The tradeoff is higher packaging cost and crimp connection quality.
To combat this, other methods are being used. One solution facilitates the connection by gluing the interposer onto cardboard and applying the antenna by printing conductive ink over both the cardboard and the interposer. Soldering is also an option.
An emerging and promising technology for chip attachment is the non-conductive paste (NCP) flip chip process. It has easy, rapid, low-cost processing; uses no additional underfill; fewer process steps; low epoxy cost; is heat-compliant with low-cost substrate materials; and is usable for reel-to-reel applications.
With the classic NCP process, the chips have gold-stud bumps, and chip assembly begins with adhesive dispensing or with screen or stencil printing. Next, the chips are placed using a flip chip bonder. Initial curing is done in parallel, under pressure, in a heated gang press (lamination). Final curing takes place in an oven (Figure 1).
Figure 1. Chip assembly process flow and its variants.
Newer developments are refining the NCP process. Final curing in the inline oven is eliminated. Since the process requires a lamination step after chip placement, it is commonly referred to as “place-and-laminate.” Exact control of the final bonding phase during lamination yields NCP packages with high reliability.
Connecting bumps to substrate pads by means of pure contact connection makes use of the pressure that develops when the adhesive shrinks in the curing process. Originally, gold-stud bumps were in use for this process. Due to their smaller contact areas, they generate higher pressure. Recently, this process was adapted for low-cost nickel-gold bumps (Figure 2).
Figure 2. Gold-stud NCP technology (top); Ni-Au NCP technology (bottom).
This cost-effective process id used to produce millions of smart-card modules every month. These packages are more reliable than those produced in the traditional chip-and-wire technology. It also works in the production of RFID tags.
Low Cost RFID Assembly Line
The centerpiece of this low cost RFID assembly line is a high-speed flip chip machine. Using two mirrored assembly systems, each consisting of a flipper, an upward-looking camera, and a gantry equipped with a bonding head and substrate camera, it distributes the chips picked from one wafer among the two assembly systems. Once there, chips are processed at a slower pace. This architecture increases the machine’s perfomance potential. An integrated dispenser is included for adhesive application. This entire set of functions is provided on a small footprint of 1.6 × 1.2 m. Finally, a heated press applies pressure and heat, curing the dies in parallel to complete the lamination (Figure 3).
Figure 3. Bonding of Cu antennas.
On a pilot line, suppliers are proving that RF antennas with 12-µm-thick copper layers used for passive RFID tags can be manufactured in an additive copper plating process that is 60% more effective than today’s etching techniques. For an ultra-high-frequency antennae with 3-µm-thick copper layers, there is further cost-reduction potential. For an antenna that is manufactured on a flex antenna plating (FAP) line, cost is calculated at less than 0.2¢ which provides sufficient headroom for further reductions (Figure 4).
Figure 4. Flexible antenna plating line.
Electroless Ni-Au Bumping
To date, the majority of bumps for RFID chips were either gold-stud or electro-plated (sputter/galvanic process). Now, the low-cost nickel-gold process, which was developed at the Fraunhofer IZM in Berlin, Germany, has been introduced to high-volume production. Meanwhile, the FAP pilot line is running at real-world conditions and negotiations between several industrial customers to develop complex manufacturing solutions (Figure 5).
Figure 5. Low-cost Ni-Au bumps (left); Ni-Au bumping pilot line (right).
RFID chip assembly at 0.1¢ per chip is ambitious. But it is a realistic goal and preparations for manufacturing setups are well underway. In due time, a new business infrastructure based on extremely low-priced RFID tags will open up limitless possibilities for a new generation of secure supply-chain management tools, as well as consumer product efficiency solutions.
HUGO PRISTAUZ, director advanced technology & RFID business development, may be contacted at Datacon Technology GmbH, Innstrasse 16 A-6240, Radfeld/Tirol, Austria; 43 5337 600140; E-mail: hugo.pristauz @datacon.at.