Issue



SiP Package Design - Where the IC and PCB Meet


11/01/2007







BY JOHN ISAAC, Mentor Graphics Corporation

Is package design an extension of IC design or PCB design, or both? Should pin-outs be driven by the ICs and components on the package, or by the PCB(s) on which the package will be mounted? With the increase in package design complexity, can we live with the same tools we have had in the past? Answers to these questions depend on the company, application, organization and type of package being designed.

Consider the single-chip package typically used for a higher-end ASIC. Ideally, the PCB and the pin-out of the ASIC should already be in design so the package could be influenced by connectivity and performance requirements. However, in the past, the ASIC and its package were designed and handed off to the PCB designer to implement on the board. In this case, the pin-outs of the ASIC and package will be determined solely by the ASIC design, and the PCB design must accommodate the package as produced. This has often resulted in a compromise in system performance and routability. Fortunately, tools exist that enable collaboration between the ASIC and PCB designers, so package pin-outs can be optimized.

But who should design the ASIC package and what tools should be used? For today’s high pin-count, high-speed ASICs, design tools need automated functionality such as 3D wirebond, chip stacking, and cavities; tapering of the traces to fan out from IC pads to the package pins; automatic routing of the substrate following high-speed delay constraints; and 3D parasitic extraction for high-speed analysis.

It could be argued that many of these required productivity capabilities need technology from both the IC and PCB domains, and the users of these tools are specialists that understand both domains.

System-in-package (SiP) designs are rapidly emerging due to the handheld communications industry. These designs take off-the-shelf ICs (and maybe a smaller custom ASIC) and combine them with discrete components and embedded passives to create a functional entity that removes much of the complexity from PCB design, packing it into a smaller space on the package. These SiP designs may contain mixed analog, digital, and even RF technologies, and closely resemble a compact PCB design with special requirements. They may contain wire-bond and/or flip chip interconnects, 3D stacked die, and use high-density interconnect (HDI)/microvia layers in addition to classical substrate layers.

SiPs are typically designed for a specific product or family of products and, since the design time is relatively short, their design is more likely performed in parallel with the design of the PCB. Both factors present the opportunity for the PCB design to positively influence the SiP package pin-outs and internal routing. It is now possible to optimize the performance of the system and not just the package, and reduce routing congestion (and possibly layer counts) on the PCB. Unfortunately, however, the design of the SiP and the PCB are typically performed by different organizations or even different companies. Unless the discipline is there to collaborate on the design and make trade-offs, the best end-product will not be produced.

Similar to an ASIC package design, SiP designs contain aspects of both the IC and PCB design domains such as 3D wire bonding, stacked die and IC pad driver
eceiver modeling; off-the-shelf components mounted on a substrate and connected via combinations of HDI/microvia and substrate routing; mixed technologies, discretes, and embedded passives; RF circuitry mixed with analog and digital; signal integrity, delay and crosstalk consideration, which are common with those found on high-speed boards and custom chip design; and SiP pin-out assignment in the context of the PCB.

Although much of today’s SiP design is performed by classic package designers using older graphic-oriented tools, increasing package complexity will call for more automation to meet the shortening time-to-market requirements found in the driving industries.

So, to answer the original questions: it all depends on the industry and the basic drivers. Many factors must be considered, but the bottom line is that significantly more automation is required as the complexity of designs increases in the face of competitive pressures. The burden falls not only on the EDA vendors to supply the tools, but also on the designers to be willing to adopt new processes and overcome old organizational boundaries.


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JOHN ISAAC, director of market development, Systems Design Division may be contacted at Mentor Graphics Corporation, 1811 Pike Rd. Longmont, CO, 80501; 720/494-1270; john_isaac@mentor.com.