Issue



Chips-first Approach to System-on-chip


03/01/2007







BY MARC A. MANGRUM, Freescale Semiconductor, Inc.

System-on-chip (SoC) is a concept that has been proposed and, to some extent, introduced into the electronics marketplace. It is commonplace to find monolithic ICs that integrate multiple cores such as microcontroller units (MCUs), digital signal processors (DSPs), and microprocessor units (MPUs). They can also add various flavors of memory and application-specific features. Wireless market solutions also integrate analog functionality. In all cases, four primary market motivations for using SoC are performance, size, power, and cost.


Figure 1. System-in-package example of a fully integrated wireless radio.
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As the amount of system integration increases at the silicon level, designers must address and overcome major obstacles. Fundamentally, integrating multiple types of functionality using a common wafer fab technology is challenging. For example, an SoC solution for the wireless market might require integrating RF functions with digital baseband and memories. It is fairly common to find digital baseband solutions that integrate high levels of various memories as well as analog functions, but most stop short of integrating the front-end RF function.

Beyond design and process, testability and packaging concerns must also be addressed. While integrating tremendous amounts of functionality may be an advantage, the wafer fab process can result in solutions that are neither cost-effective nor competitive. Increases in silicon manufacturing cost, higher test cost resulting from automated test equipment (ATE) platform requirements, and expensive packaging solutions driven by increased I/O and performance requirements can offset the benefits of a fully integrated SoC solution.

Facing rapidly changing consumer-demand plans and product definitions, SoC projects that typically might take two to three years to produce may become obsolete before they become available. Launching a successful SoC requires either a well-defined and stable market, or a modified approach to integration that reduces both time-to-market and cost. One such approach is a system-in-package (SiP), or chips-first, approach.

This IC packaging solution simplifies the complexity of functional system integration while enabling a faster-time to-market. In addition, it reduces system test issues and yield concerns that are observed with a more traditional SoC approach. The single biggest challenge in the chips-first model is defining the most cost-effective, manufacturable, and testable packaging solution for the system.

Traditional wire-bond SiP modules can reduce board space for the end user and potentially reduce the time-to-market factor - but can be expensive to manufacture and difficult to design. They require known good die (KGD) and high-end ATE platforms with specialized hardware and tests, and can present die interconnect and compatibility issues that must be resolved.

The success of a non-traditional chips-first approach relies on proper partitioning of the system architecture and integration of required functions, using several IC packages, into a single SiP. The final, fully integrated SiP combines the individual sub-systems into the total system solution that the customer defines.

Properly partitioning the system architecture significantly enhances one’s ability to control cost on the final system assembly. Wafer fabrication processes can be optimized for each component integrated into the system. This allows use of the lowest-cost wafer manufacturing processes for a given function. Test solutions can be selected and optimized for a given function, thereby reducing cost and test complexity. The required system-level test is then designed to verify the final component integration and validate functionality at the system level.

Additional benefits of the chips-first approach are derived from the close integration of the system components. System performance is improved; the system bill of materials (BOM) is reduced; the physical size of the system is condensed. Perhaps a more significant benefit derived from the chips-first approach is a time-to-market advantage. Producing individual components and integrating after test enables multiple cycles of learning at the component and system level. Changes, modifications, and enhancements made to the integrated system definition target only what is required. This improves yields, enabling a product to be modified to market transitions.

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MARC A. MANGRUM, advanced packaging technologies manager, wireless mobile systems group, may be contacted at Freescale Semiconductor, 6501 W. William Canon Dr., Austin, TX 78735; 512/895-2092; E-mail: marc.mangrum@freescale.com.