Choosing the Best Bump for the Buck
BY TERENCE Q. COLLIER, contributing Editor
Flip chip interconnect offers the advantages of smaller footprint on the PCB, improved electrical performance, reduced manufacturing steps at assembly, and excellent long-term reliability. Unfortunately, not every die is available in a flip chip package. However, processes have been developed to convert gold and copper stud bumps to flip chip bumps. In the past, copper was selected because of embrittlement issues with Sn and Au. A proprietary technique has been developed to add a barrier layer of NiAu to thick gold (including gold stud bumps); eliminating the need for copper stud bumps and providing alternatives for thick gold on traditional wire bond pads (Figures 1 & 2).
Why Bump Single Die?
Bumping an entire wafer might not be feasible because of time and/or cost constraints. Typical cycle times can be weeks, and minimum lot charges might cost up to $30k for a single 200-mm wafer. For today’s rapid turn times and product life cycles as short as six months, bumped die need to be available in days, and at reasonable cost to fit within product development windows.
Figure 1. Pulled wire bonds show gold beneath nickel and nickel on wire bonds. Ball bonds are only on gold and copper.
To determine if a given die performs to specifications, a product designer typically needs a few die to build boards or modules. In some cases, three or more die might be under evaluation for the same finished product. Bumping three wafers at $30k each might be beyond the budget of small business groups. There are at least three alternatives to flip chip bumping an entire wafer. One choice is to bump single die, which is quick, less expensive, and is as reliable as bumping whole wafers. The second choice is to gold stud bump the die. The final choice is to use ”converted“ gold stud bumps.
Figure 2. This close-up view shows the gold beneath the nickel layer.
Gold stud bumping allows for the use of thermosonic welding. An alternative to thermosonic welding is to add conductive epoxy and ”cement“ the die for electrical contact. While thermosonic is reliable and predictable, high pin counts can prove difficult for bonding to flex and PCB surfaces. Thermosonic also requires special tooling and additional assembly steps.
Conductive epoxy also requires a special assembly operation, but beads of epoxy can be dispensed repeatably and consistently for applications having 250 μm or greater pitch. Any smaller than 250 μm, and the epoxy bleeds, leading to shorts, insufficient metal load in the bead (leading to variation in conductivity), suspect reliability, and poor yield. Aging or high temperatures further reduces performance and can cause failures in the cured epoxy.
In one case study, the engineer followed a standard regiment that resulted in zero yield. Beginning with a 65-μm pad and 90-μm pitch he tried gold stud bump, followed by ultrasonic welding to the flex. Next was gold stud bump followed by epoxy which resulted in poor yield. An attempt at gold stud bump attached to pre-tinned pads lead to embrittlement as well as poor wetting, resulting in poor yield and poor reliability. The answer was gold stud bump with an under bump metallization (UBM) on gold stud with solder attach. The result was good yield add and good reliability.
To improve yield and reliability, the third alternative, adding UBM to the gold, must be chosen. Either Au or Cu stud bumping can be accomplished with a wire bonder. While Cu/Sn intermetallics are not as bad as Au/Sn intermetallics, copper stud bumping is not as easy as gold stud bumping or as widely available. Adding UBM to the gold stud bump eliminates the risk of embrittlement, allowing the use of pre-tinned pads as an interconnect for tight pitch.
Indium Solder vs. Tin-based Solders
Indium solders are typically chosen for Au stud bumps as they don’t embrittle like tin-based solders in the presence of gold. High indium solders can manage up to 20% by weight compared to 4% for SnPb based solders (and 8% for high Sn). As a rule, indium consumes gold at a rate 17 ?? slower than tin. The result is a bump that looks like a standard flip chip bump and can use the same assembly processes as standard flip chip die.
Gold will slowly diffuse into tin even at low temperatures (75??C) and rapidly above 100??C to 125??C range. Gold will diffuse into indium as well, but a safer temperature range of 100??C to 120??C provides improvement (in addition to the ability to hold up to 20 weight percent). Indium-based solders also have the advantage of better performance at cryogenic temperatures. More importantly, the converted bumped die can be placed on the bond pads next to traditional bumped die and leaded packages, flowed through a belt furnace, and provide good yield and excellent reliability.
Flip chip bumping, traditional or converted, addresses critical manufacturing and reliability concerns that cannot be controlled by bumps with conductive epoxy. Coplanarity, pitch, cycle time, and equipment availability are key issues during fine pitch (small bump <200 μm diameter) assembly. Bump to bump height variation (coplanarity) for gold stud bump assembly using thermosonic has to be in the 5-μm range. Since the flip chip solder completely encases the bump, the 5 μm tolerance range can be negated. Flip chip coplanarity can be acceptable up to 20 μm or more for bumps in the 100 μm range.
Even with the latest and greatest dispense equipment, conductive epoxy cannot come close to the coplanarity obtained with flip chip bumps. Two reasons behind poor coplanarity lie in the way conductive epoxy is formulated combined with the dispense method. Conductive epoxy consists of a liquid that serves as a carrier and ”epoxy“ with a suspended metal for electrical contact. When dispensed through a small needle, the ratio of liquid to solids can vary from bump to bump. Even before the liquid cures, evaporating solvents will change the bead size.
Solder can be controlled to within a few microns using various techniques for fine-pitch coplanarity. Converted solder bumps have equal control on coplanarity as traditional bumps, thus allowing tighter pitch than dispensed epoxy techniques. Also, solder does not bleed like epoxy, which can lead to leakage (electrical) and corrosion. Epoxy attachment also suffers from fine-pitch bridges with excess force.
Solder bumps have the advantage that reflow will cause the bumps to collapse as they wet the PCB bond pad. During this collapse, bumps that were not initially in contact with the PCB pads due to variations in height will wet and attach to the pads. Since converted bumps perform like traditional flip chip bumps, standard pick-and-place tools can be used, and the converted flip chip die can be sent through the reflow oven with the other components on the PCB BOM. Reflowing the converted flip chip die with the remainder of the flip chip components and BOM saves cycle time, handling steps, and equipment cost. All this and improved reliability. What more can a process engineer ask for?
Cu/Au Pillars vs. NiAu Plated Gold Pillars
There is a process for adding an aluminum wedge bond and converting to a solderable layer with a NiAu UBM similar to an aluminum bond pad. Solder can then be reflowed onto the pad. As aluminum wedges don’t always have consistent area, the bump can vary in size beyond acceptable coplanarity constraints. Additionally, aluminum wedges can cause reliability issues as the dragging motion can damage low-k materials.
Another option is to add a copper stud bump. Unfortunately, there is no real long-term reliability data on the Cu to Al intermetallic. As copper stud bumping requires special processes/fixtures or bonder, it is not as available as Au stud bumping. However, there is the advantage that Sn can be applied directly to the Cu without the detrimental effects of even a small amount of Au in Sn.
There are bad CuSn intermetallics as well as bad AuSn intermetallics. Copper oxidizes quickly, which means solder wetting might be problematic without heavy fluxing. Another pitfall of Cu in contact with Sn is that the copper will be consumed on repeated reflows, although it’s unlikely an entire solder ball would be consumed like a thin-film copper UBM. On each successive reflow as copper is consumed, the reflow temperature of the solder rises resulting in a brittle solder alloy, poor wetting, and the possibility of joint dissociation.
Gold and tin will form AuSn4 intermetallics at 4% weight volume of SnPb. This brittle intermetallic can lead to cracks at boundary layers and failures within the joint itself. Thin gold layers of 500 Å are better at protecting the base metal from oxidation while not embrittling solder. Unfortunately, a gold stud bump (or the thick stencil gold pads and traces) provides an infinite source of gold for embrittling the tin. In addition to embrittling, thick gold will cause the melt temperature to rise, freezing the solder leading to poor wetting.
A better approach is to add a barrier metal on the gold or copper followed by a thin gold layer. The barrier layer prevents IMC formation between the Sn and Au or Sn and Cu, providing a more reliable and dependable solder joint. Not only can this layer be added to stud bumps, but the approach works on thick-film gold paste and sputtered metal on substrates that are traditionally used for wire bond RF substrates.
Figure 3. Cross section of gold bump with solder.
By adding the barrier metal, a broader possibility of solders is available. With gold stud bumps, indium-based metals were the only real option; using barrier metal solders of In, Sn, Au and Pb. With over 97% of the stud bump market, the data on gold to aluminum bumps are well understood and documented. The nickel-gold layers also do a good job of sealing the aluminum bond pad from oxidation and corrosion. Shear data on flip chips bumps show 30g-40g of force deforming the solder. With a gold pillar inside the bump, force value over 50 grams have been demonstrated (Figure 3). Gold also has the advantage of better electrical conductivity than copper, providing a slight advantage in performance. Adding NiAu to copper eliminates the oxidation problem, improving wetting and minimizing the need for a flux while reducing the intermetallic and copper consumption concerns.
Being able to eliminate epoxy attach is an advantage both electrically and mechanically. Epoxy is messy, difficult to control the volumes from drop to drop, and the electrical performance degrades over time. Since gold stud bumps represent over 97% of the market, conversion to flip chip die with NiAu layers provides alternatives to copper bumps and InAu converted flip chip bumps. When all else fails, bumping single die can reduce the cycle time for development by weeks and even months.
TERENCE Q. COLLIER, contributing editor, can be contacted at CVInc. 850 S. Greenville, Suite 108 Richardson, TX, 75081; 214-557-1568; email@example.com.