Mainstream MEMS: monolithic or hybrid?
By Roger Allan
A recent spate of spectacular MEMS product developments aimed at large mainstream applications has kindled debate about MEMS’ suitability for high-volume CMOS manufacturing. Has MEMS’ moment arrived? Most experts express optimism that the time is coming closer, but they believe it will be challenging to monolithically integrate a MEMS structure and a CMOS circuit - for, say, signal conditioning - on the same wafer.
At the MEMS Industry Group’s Executive Congress in November in Scottsdale, Ariz., a common theme was that it is very challenging to establish a common manufacturing process that can be implemented by foundries like TSMC or Chartered Semiconductor - and that’s a major reason why nearly all MEMS manufacturers use their own processes. At the same time, many say there’s a trend for MEMS companies to go fabless.
The trouble is, said Kevin Shaw, director of business development at Sensor Platforms, “MEMS processes do not integrate well with CMOS. A MEMS element is not optimally designed for electrical properties but for mechanical properties. Stability issues can arise in trying to integrate MEMS onto a CMOS wafer.” Sensor Platforms specializes in ASICs for MEMS sensors or actuators.
Indeed, many MEMS manufacturers prefer to use a hybrid approach to make cost-effective devices rather than a pure monolithic method. Often, the MEMS element is on one chip while the signal-conditioning circuitry is on another, usually an ASIC. Interconnecting the two requires a very careful approach to ensure that acceptable yield and reliability levels are achieved.
SiTime makes use of a process called “MEMS First” that buries the MEMS element within a wafer. Source: SiTime
“It is not sufficient to have only a sensor or actuator to act on data,” said longtime MEMS consultant Roger Grace. “You also need signal conditioning to provide analog-to-digital conversion, temperature compensation, filtering and a myriad of other functions that is deliverable to the rest of the system’s computer for analysis and decision making. And the hybrid approach is what a majority of MEMS IC volume producers have chosen.”
He tempers his remarks with the observation that there’s room for both monolithic and hybrid approaches in MEMS, depending on the application of the MEMS IC and the cost-effectiveness of the manufacturing process.
InvenSense Inc., for example, has made dual-axis CMOS MEMS gyroscopes using a proprietary, patented, wafer-level packaging that allows the company to fully test the IC at the wafer level. The bonding process provides electrical connections between both wafers and creates a hermetic seal between them.
In the company’s view, this approach avoids many pitfalls associated with trying to integrate the MEMS and CMOS processes, as done with a surface micromachining process like that used by Analog Devices for its MEMS accelerometers.
Akustica’s design for its MEMS microphone combines both CMOS electronics and MEMS sensing elements on a single wafer. Source: Akustica
Akustica has shown that a monolithic MEMS IC can be made on a CMOS process. In the Akustica microphone, being manufactured by X-FAB Semiconductor Foundries AG, the metallization layer serves as the MEMS element. Specifications released so far show impressive performance. The company is bullish on its chips, and is predicting large shipments of its MEMS ICs, not only as microphones, but also for CMOS sensors of all types.
It should be noted that Analog Devices has successfully manufactured MEMS ICs like accelerometers, gyroscopes, and more for a long time using its iMEMS process, whereby the MEMS element sits next to the signal-conditioning CMOS on the wafer. So has Texas Instruments, with its digital micro-mirror device (DMD) for projectors and televisions. It sits on the same CMOS wafer holding the electronics. Both companies have been very successful in the market with their products.
Analog Devices’ design for its sensors puts the MEMS elements on a wafer next to signal conditioning CMOS circuitry. Source: Analog Devices
Analog Devices and TI, however, use their own in-house-developed fabrication processes. And there’s a general consensus in the MEMS community that for a fabless IC design house to be successful in MEMS manufacturing, it must have the volumes and thus the lower costs to use an outside CMOS foundry.
In the case of the SiTime MEMS resonator, the company makes use of a two-chip proprietary process called “MEMS First” that uses an Epi Seal packaging process licensed from Bosch. The Silicon Valley Technology Center (SVTC) helped SiTime develop a manufacturing process for the timing chip.
Bert Bruggeman, SVTC’s managing director, believes the SiTime approach is a good example of making MEMS devices with a CMOS process. “The MEMS element is transparent to the CMOS process,” he said. He also praised the Akustica design.
He cautions, however, that MEMS devices need to be developed for 8-inch wafers to be manufactured cost-effectively in volume. “It may take two to three years before we go from a MEMS design to large-scale production,” he said. “In five years, we may see an entirely new way of making MEMS. As the market starts growing, many of the present MEMS manufacturing problems will be worked out.”