Developmental fabs tackle unique contamination issues



SANTA CLARA, Calif.—When it comes to manufacturing, the philosophy at Matrix Semiconductor Inc. ( is there's nothing new in the process. Dan Steere, the fabless company's vice president of sales and marketing, points out that Matrix engineers focus on not introducing new materials or equipment into the processing of the company's 3D non-volatile memory products. Steere says, "The mantra in the engineering team is 'no new atoms.'"

In early July, Matrix announced it was using the Silicon Valley Technology Center (SVTC) of Cypress Semiconductor Corp. (San Jose, Calif.; to prototype its 3D products. One day later, International Sematech Inc. (Austin, Texas; announced that it had spun off its research and development wafer fab and the associated analytical laboratories into a new subsidiary—the Advanced Technology Development Facility Inc. (ATDF).

Together, these events signal a new demand and capability for wafer prototyping, as well as new contamination-control challenges.

Of the two, the Matrix/Cypress collaboration has a more immediate commercial focus. According to Matrix's Steere, the company plans overseas manufacturing in a wafer foundry and should soon start shipping large product volumes.

Inside Cypress Semiconductor's Silicon Valley Technology Center (SVTC), where companies can develop silicon-based technologies in a proof-of-concept-to-manufacturing set-up. Customers also have access to Cypress' 65-nm R&D fab.
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First, though, Matrix has had to prototype its devices, which has been done in Cypress' SVTC. This 20,000-square-foot research and development facility offers cleanroom space and access to a toolset capable of manufacturing state-of-the-art 65-nm feature-size devices. Cypress also provides its SVTC customers a suite of services that include simulation software, a manufacturing execution system, and yield and failure analysis tools.

Cypress operates the SVTC for itself and other companies, including fabless ventures like Matrix. It manages all the equipment maintenance, tool modification, and mask generation during pilot manufacturing in the prototyping facility.

Matrix, however, is unlike other fabless concerns in that it does not simply use an existing standard process recipe with a known baseline and contamination-control strategy. "We make a lot of unique demands on the process," explains Steere. "In fact, a big part of Matrix's mission is process engineering."

Stacking the chips

Matrix products aim to solve one of the problems confronting all semiconductor manufacturing: increasing circuit complexity requiring more and more transistors being crammed onto a given piece of silicon real estate. The traditional solution has been to go to smaller feature sizes, but smaller features are harder and more expensive to produce.

The solution being pursued at Matrix involves stacking active circuit elements on top of one another, leading to a chip that goes up instead of out. The hope is that the method will result in the lowest possible device cost. But this approach requires extensive modifications to the process, something fabless companies don't often do.

Fortunately for Matrix, Cypress had just this type of customer in mind for its SVTC. "This is a dedicated R&D facility where customers can develop their novel silicon-based technologies," says Bert Bruggeman, SVTC's managing director. Bruggeman notes that no production runs in the facility. Everything is made to be transferred out, with design for manufacturing methods used to make the transition easier.

Another example of this type of developmental fab, Sematech's ATDF, will continue to serve as the primary prototyping fab for the research consortium. But ATDF will also be available to an expanded customer base. This, according to Sematech's official announcement of ATDF's creation, is a move designed to meet the mounting research and development needs of the semiconductor and related industries. Plans are to make the facility available to both commercial and university users.

Currently, ATDF runs isolated transistors and not the densely packed circuitry found in a production device. According to Brent Ames, global sales manager for ATDF, the factory pushes out about 10,000 wafers per month—fairly substantial for a prototyping facility. He notes that while the prototype devices lack transistor density, they can run through a complicated manufacturing flow and thus experience special contamination-control strategies.

"We have available approximately 4,000 process flows. So, it is a very rigorous activity to keep everything in line in regards to, say, copper versus non-copper," says Ames. "We also bring in new materials. If it's something that hasn't been run before, then we have to put very strict contamination controls."

These controls include tests to spot trace elements that may inadvertently escape from a tool. A typical approach, explains Ames, involves multiple passes with different analysis tools. Dummy or witness wafers are processed through a tool and then analyzed using total reflectance X-ray fluorescence (TXRF) or vapor phase decomposition (VPD). Both of these tests look for trace metals and other elements.

Often, such tests have to come back negative, indicating that there is no contamination, before tools can be released to production. Therefore, after a process changeover, tools will be cleaned and then tested for trace contaminants. Depending on the tool and the process, the entire cycle can take considerable time.

A hidden assumption in this method involves the baseline condition of the tool or processing chambers before the process changeover took place. ATDF emerging technologies product engineer Jeffrey Wetzel, in describing a scenario in which a new material is going to be used, says it's expected that this material will contaminate the processing tool chamber in some fashion—but this is the only chamber, and so it must be shared.

The question then becomes how to remediate the tool back to its previous condition once the processing is done. This clean-up could involve wet chemistry or dry plasma to remove any films and trace contaminants. Part of the procedure will involve various measurements to spot any trace impurities left over. But before anything is done, a basic question has to be answered about the chamber itself.

"The trick is just first knowing what's there to start with," says Wetzel. Without a proper baseline, he adds, it's not possible to know how much, if anything, has been added. For a new material, however, it may be necessary to run the tests before any change takes place. So, another testing round and associated delay could be necessary.

Alternative strategy

Due to confidentiality agreements, ATDF cannot reveal its customers, but Sematech clearly believes there's a demand for this service. Matrix's Steere thinks other fabless companies may well follow his company's lead. SVTC's Bruggeman thinks that this approach and its implementation at SVTC "… offers customers an alternative strategy for taking a product from proof-of-concept to manufacturing in a more cost-effective method."

Process innovations provide a competitive edge. If fabless companies are to economically implement process improvements, they might well need the services of nearby prototyping facilities like ATDF and SVTC. On the other hand, not everyone is so sure that this is a model of the future.

Jerry Worchel, a senior analyst in semiconductors for the market research firm In-Stat/MDR (Scottsdale, Ariz.;, sees cooperation between foundries and integrated device manufacturers with regard to the development of a manufacturing process. But he characterizes what fabless companies do as tweaking the base process.

Extensive process research and development, he points out, is simply too expensive.