Crossbar unveils resistive RAM with simple, three-layer structure
Crossbar, Inc., a start-up company, unveiled a new Resistive RAM (RRAM) technology that will be capable of storing up to one terabyte (TB) of data on a single 200mm2 chip. A working memory was produced array at a commercial fab, and Crossbar is entering the first phase of productization. “We have achieved all the major technical milestones that prove our RRAM technology is easy to manufacture and ready for commercialization,” said George Minassian, chief executive officer, Crossbar, Inc. The company is backed by Artiman Ventures, Kleiner Perkins Caufield & Byers and Northern Light Venture Capital.
The technology, which was conceived by Professor Wei Lu of the University of Michigan, is based on a simple three-layer structure of silver, amorphous silicon and silicon (FIGURE 1). The resistance switching mechanism is based on the formation of a filament in the switching material when a voltage is applied between the two electrodes. Minassian said the RRAM is very stable, capable of withstanding temperature swings up to 125°C, with up to 10,000 cycles, and a retention of 10 years. “The filaments are rock solid,” he said.
Crossbar has filed 100 unique patents, with 30 already issued, relating to the development, commercialization and manufacturing of RRAM technology.
After completing the technology transfer to Crossbar’s R&D fab and technology analysis and optimization, Crossbar has now successfully developed its demonstration product in a commercial fab. This working silicon is a fully integrated monolithic CMOS controller and memory array chip. The company is currently completing the characterization and optimization of this device and plans to bring its first product to market in the embedded SOC market.
Sherry Garber, Founding Partner, Convergent Semiconductors, said: “RRAM is widely considered the obvious leader in the battle for a next generation memory and Crossbar is the company most advanced to show working demo that proves the manufacturability of RRAM. This is a significant development in the industry, as it provides a clear path to commercialization of a new storage technology, capable of changing the future landscape of electronics innovation.”
|FIGURE 1. The resistance switching mechanism of Crossbar’s technology is based on the formation of a
filament in the silicon-based switching material when a voltage is applied between the two electrodes.
Crossbar technology can be stacked in 3D, delivering multiple terabytes of storage on a single chip. Its simplicity, stackability and CMOS compatibility enables logic and memory to be integrated onto a single chip at the latest technology node (FIGURE 2).
Crossbar’s technology will deliver 20x faster write performance; 20x lower power consumption; and 10x the endurance at half the die size, compared to today’s best-in-class NAND Flash memory. Minassian said the biggest advantage of the technology is its simplicity. “That allowed us in three years time to get from technology understanding, characterization, cell array and put a device together,” he said.
Minassian said RRAM compares favorably with NAND, which is getting more complex and expensive. “In 3D NAND, you put all of these thing layers of top of each other – 32 layers, or 64 or 128 in some cases – then you have to etch them, you have to slice them all at once and the equipment required for that accuracy and that geometry is very expensive. This is one of the reasons that 3D has been very difficult for NAND to be introduced.” With the Crossbar approach, “you’re always dealing with three layers. It’s much easier to stack these and it gives you a huge density advantage,” Minassian said.
“The switching media is highly resistive,” explains Minassian. “If you try to read the resistance between top and bottom electrode without doing anything, it’s a high resistance. That’s the off state. To turn on the device, we apply a positive voltage to the top electrode. That ionizes the metal on the top layer and puts the metal ions into the switching media. The metal ions form a filament that connect the top and bottom electrode. The moment they hit the bottom electrode, you have a short, which means that the top and bottom electrode are connected which means they have a low resistance.” The low resistance state is the on state. He said that although silver is not commonly used in front-end CMOS processing, the RRAM memory formation process is a back-end process. “You produce all your CMOS and then right before the device exits the fab, you put the silver on top,” he said. The silver is deposited, encapsulated, etched and then packaged. “That equipment is available, you just have to isolate it at the end,” Minassian said.
|FIGURE 2. Crossbar’s simple and scalable memory cell structure enables a new class of 3D RRAM which can be incorporated into the back end of line of any standard CMOS manufacturing fab.|
The approach is also CMOS compatible, with processes used to fabricate the memory layers all running at less than 400°C. “This allows you to not only be CMOS compatible, but it allows you to stack more and more of these memory layers on top of each other,” Minassian said. “You can put the logic, the controllers and microprocessors, next to the memory in the same die. That allows you to simplify packaging and increase performance.”
Another advantage compared to NAND is that the controllers used to address the cells can be less complicated. Minassian said that in conventional cells, 30 electrons are required to produce 1 Volt. “If you shrink that to a smaller node, the number of electrons is less. Fewer electrons are much harder to detect. You need a massive controller that does error recovery and complex coding so if the bits are changed, it can still provide you the right program to execute.” Also, because the Crossbar RRAM is capable of 10,000 write cycles, less complicated controllers are needed. Today’s NAND is capable of only 1000 write cycles. “If you write information 1000 times, that cell is destroyed. It will not contain or maintain the information. You have this complex controller that keeps track of how many cells have been written, how many times, to make sure all of them are aged equally,” Minassian said.
Non-volatile memory, expected to grow to become a $60 billion market in 2013, is the most common storage technology used for both code storage (NOR) and data storage (NAND) in a wide range of electronics applications. Crossbar plans to bring to market standalone chip solutions, optimized for both code and data storage, used in place of traditional NOR and NAND Flash memory. Crossbar also plans to license its technology to SOC developers for integration into next-generation systems-on-chips (SOC).
Michael Yang, Senior Principal Analyst, Memory and Storage, IHS, said: “Ninety percent of the data we store today was created in the past two years. The creation and instant access of data has become an integral part of the modern experience, continuing to drive dramatic growth for storage for the foreseeable future. However, the current storage medium, planar NAND, is seeing challenges as it reaches the lower lithographies, pushing against physical and engineering limits. The next generation non-volatile memory, such as Crossbar’s RRAM, would bypass those limits, and provide the performance and capacity necessary to become the replacement memory solution.” •