Synopsys, Inc. today announced it has extended its collaboration with STMicroelectronics to include Samsung Electronics, enabling broader market adoption of ST's 28nm FD-SOI technology for SoC design. Synopsys' Galaxy Design Platform is production-proven on multiple designs based on ST's 28nm FD-SOI technology. This collaboration extends the Galaxy design flow to Samsung in support of their strategic agreement to offer dual sourcing of ST's 28nm FD-SOI technology. Developed over a multiyear collaboration with ST, the design flow enables concurrent area, power and timing optimizations to enable engineers to optimize their designs for the ST 28nm FD-SOI process.
"The close collaboration between ST design teams and Synopsys led to advanced silicon-proven design enablement solutions that fully leverage the performance and power promise of FD-SOI technology and provide the foundation needed to meet tight time to market windows," said Philippe Magarshack, executive vice president, Design Enablement and Services, STMicroelectronics. "Our close collaboration with Synopsys has already enabled many successful tapeouts with mutual customers using Synopsys' Galaxy Design Platform and Lynx Design System."
The Synopsys design flow for ST's 28nm FD-SOI is compatible with the Lynx Design System, a full-chip design environment providing innovative automation and visualization capabilities that enable higher designer productivity and faster design closure. A technology plug-in using ST's 28nm FD-SOI Process Design Kit (PDK), standard cells and memories, adapts the production-proven Galaxy Design Platform-based RTL-to-GDSII flow for 28nm FD-SOI SoC designs, accelerating project setup and execution. Lynx automation simplifies and accelerates many critical implementation and validation tasks, including back-bias management across the flow, special connection checks, In-Design physical verification for well connections and UPF supply set management for N-wells and P-wells.
Galaxy advanced design enablement features like the IC Compiler tool's concurrent clock and data optimization, layer-aware optimization, physical datapath and comprehensive support for hierarchical and low power design features can also be directly accessed by Lynx users for high-performance and low power CPU and GPU design.
"28nm FD-SOI is an ideal solution for customers looking for extra performance and power efficiency at the 28nm node without having to migrate to 20nm," said Dr. Shawn Han, vice president of foundry marketing, Samsung Electronics. "Our close collaboration with Synopsys and ST will enable designers to reduce risk, accelerate time-to-market, minimize power and maximize performance to expand 28nm FD-SOI adoption."
"Because the Galaxy Design Platform is silicon-proven on ST's 28nm FD-SOI process with multiple tapeouts of low power designs running in the gigahertz frequency range, customers can adopt this technology with confidence," said Antun Domic, executive vice president and general manager, Design Group at Synopsys. "Combined with the Lynx Design System and DesignWare IP, the Galaxy Design Platform enables engineers to derive maximum benefit from the FD-SOI process and our continued collaboration with ST and Samsung will ensure ease of adoption of FD-SOI for SoC design."
This paper explains the basic history, processes, and applications of the ultimate conformal coating, parylene. Parylene has historically been used to protect printed circuit boards, LEDS, and medical devices from rugged environments and the human body, but now the pin-hole free coating is being used increasingly by the leaders in the MEMS market. With no known chemical that can harm the film, it is a perfect application for fuel tanks, water meters, or any product that must function in a hazardous environment.
May 22, 2014Sponsored by Diamond-MT
Modern electronics have become part of our daily lives and the sophisticated electronic circuitry at the heart of these devices and systems must be reliable. Conformal coatings act as a barrier between the electronics and the environment, protecting the areas they cover while strengthening delicate components and traces. Find out more about how conformal coatings enhance the reliability and longevity of electronic printed circuit boards.April 24, 2014Sponsored by Master Bond, Inc.,
July 2014 (date and time TBD) Wet processing including wafer cleaning, is one of the most common yet most critical processing step, since it can have a huge impact on the success of the subsequent process step. Not only does it involve the removal of organic and metal contaminants, but it must leave the surface in a desired state (hydrophilic or hydrophobic, for example), with minimal roughness and minimal surface loss – all on a growing list of different types of materials. In this webcast, experts will identify industry challenges and possible solutions.
July 2014 (date and time TBD) The switch to 450mm will likely be the largest, most expensive retooling the semiconductor industry has ever experienced. Will you be ready? 450mm fabs, which will give an unbeatable competitive advantage to the largest semiconductor manufacturers, are likely to cost $10 billion and come on-line in 2017, with production ramp in 2018. Unprecedented technical challenges still need to be overcome, but work is well underway. This webcast will provide an update on the current status of activities, key milestones and schedules, and the status of 450mm research on processes and devices.
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