Issue



EUV lithography progress emphasized at SPIE Advanced Lithography


2017-03-27 08:57:22

New extreme-ultraviolet (EUV) lithography equipment unveiled by ASML, announcement by Intel of eight EUV programs ready to be rolled out, and introduction by IMEC of the industry’s first comprehensive solution for EUVL-enabled high-volume manufacturing systems were among highlights at SPIE Advanced Lithography 2017 in San Jose earlier this month.


Sponsored by SPIE, the international society for optics and photonics, the annual event is the year’s primary forum for the industry. Attendance was up this year over last, with nearly 2,300 participating, and ran 26 February through 2 March.


Speakers from ASML, Intel, KLA-Tencor, JSR Corp, IMEC, Samsung, and other organizations emphasized progress being made toward manufacturing computer chips using sub-10nm node lithography, sparking much discussion about when, where, and how — plus the occasional if — the next generation of lithography tools will enable high-volume and high-throughput manufacturing at an EUV wavelength of about 13.5nm. Presentation recordings are viewable on the SPIE Newsroom on SPIE.org.


Product System Engineer Mark van de Kerkhof reported on ASML’s NXE:3400B EUV scanner, which enables sub-10nm-node lithography — ASML’s first scanner that can produce 125 wafers/hour, the throughput rate needed in production fabs.


With ever-smaller feature sizes being designed, mask makers must continuously advance their technologies as EUV sources and other lithography tools advance, noted plenary speaker Frank Abboud, Vice President of Technology and Manufacturing Group at Intel, and General Manager, Intel Mask Operation.


“Almost every module in the mask shop is touched," he said, including blank preparation, fiducial mark patterning, device patterning, black-border patterning, and metrology/characterization.”


Plenary speaker Ben Tsai, Chief Technology Officer and Executive Vice President of Corporate Alliances at KLA-Tencor, spoke on the return on investment of defect detection.


Inspection and metrology can involve 1,000 process steps for an advanced graphics processing unit, each requiring extremely high accuracy, he noted. In such a process model, if each step was 99.5% perfect, fewer than 1% of manufactured devices would work, illustrating the importance of investment in inspection and metrology to identify and resolve essentially all defects.


Starting with a vision of drivers for next-generation computing such as artificial intelligence (AI) and the computational power required, Nobu Koshiba, President and CEO of JSR Corporation, pointed out the extent to which the information explosion trending for years is continuing, with estimated data traffic in 2020 being 7× greater than in 2015.


The growth is stimulating AI advances, as are autonomous driving, precision medicine, genomic science, and cognitive computing, he said.


In a keynote talk, Philippe Leray, IMEC Group Leader of Advanced Metrology, described development of the first comprehensive solution for EUVL enablement in high-volume manufacturing. The approach serves as a basis for industry requirements for power, performance, area and cost, and includes proposals for design rules, masks, photoresists, etching, and metrology and an extensive process variation assessment, Leray said.


Donis Flagello, President, CEO, and COO of Nikon Research Corporation of America (NRCA), was presented with the 2017 Frits Zernike Award for Microlithography.


Semiconductor pioneer Burn Lin (National Tsin Hua University) was honored on the 30th anniversary of the Optical Microlithography conference in recognition of his serving as the first chair of the conference in 1988, and of his outstanding contributions to the lithography community. Lin was the founding editor of the SPIE Journal of Microlithography, Microfabrication, and Microsystems (JM3).


Six new Fellows of SPIE were recognized: Emily Gallagher (IMEC), Yuri Granik (Mentor Graphics), Qinghuang Lin (IBM Thomas J. Watson Research Center), David Pan (University of Texas, Austin), Mark Phillips (Intel Corp.), and James Thackarey (Dow Electronic Materials).


Bruce Smith, Rochester Institute of Technology, served as symposium chair, and Will Conley of Cymer, an ASML company, was symposium co-chair.


SPIE Advanced Lithography included seven conferences on lithographic topics, along with technical courses taught by experts from industry and academia, and a two-day exhibition.