Process Watch: The (automotive) problem with semiconductors
By David W. Price, Douglas G. Sutherland and Jay Rathert
Author’s Note: The Process Watch series explores key concepts about process control—defect inspection, metrology and data analysis—for the semiconductor industry. This article is the first in a five-part series on semiconductors in the automotive industry. In this article, we introduce some of the challenges involved in the automotive supply chain. Future articles in the series will address specific process control solutions to those challenges.
In the 1950s less than 1% of the total cost of manufacturing a car was comprised of electronics. Today that cost can be more than 35% of the total and it is expected to increase to 50% by the year 2030.1 The rapid increase in the use of electronics in the automotive industry has been driven by four main areas:
- Systems monitoring and control (electronic fuel injection, gas-electric hybrids, etc.)
- Safety (anti-lock brakes, air bags, etc.)
- Advanced Driver Assistance Systems (lane departure warning, parking assist, blind spot monitoring, adaptive cruise control, etc.)
- Convenience (satellite navigation, infotainment, etc.)
Semiconductor components are at the core of the electronics integrated in cars, and depending on the make and model, a modern car may require as many as 8000 chips.2 This number will only increase as autonomous driving gains popularity – additional electronic subsystems with their underlying ICs will power the sensors, radar and AI needed for driverless cars.
With over 88 million cars and light trucks produced every year,3 each with thousands of chips, the influence of the automotive industry on semiconductor manufacturing is starting to take hold. There is one simple fact about these thousands of chips found in a car: they cannot fail. Reliability is absolutely critical for automotive semiconductor components. Any chip that fails in the field can result in costly warranty repairs and recalls, can damage the image of the automaker’s brand – or at the extreme, can result in personal injury or even loss of life.
If the average car contains 5000 chips and the automaker produces 25,000 cars per day, then even a chip failure rate at the parts per million (ppm) level will result in more than 125 cars per day that experience reliability issues as a result of chip quality. With semiconductors as the top issue on automakers’ failure Pareto,4 Tier 1 automotive system suppliers are now demanding parts per billion (ppb) levels of semiconductor quality with an increasing trend toward a maximum number of “total allowable failure events” regardless of volume. Current methods for finding reliability failures are overly dependent on test and burn-in, and as a result, the quality targets are missed by orders of magnitude. Increasingly, challenging audit standards are pushing for reliability failures to be found at their source in the fab, where costs of discovery and corrective action are the lowest. To enter this growing market segment – or simply maintain share – IC manufacturers must aggressively address this inflection in chip reliability requirements.
Fortunately for semiconductor manufacturers, chip reliability is highly correlated to something they know very well: random defectivity.5 In fact, for a well-designed process and product, early-life chip reliability issues (extrinsic reliability) are dominated by random defectivity.6-12 A killer defect (one that impacts yield) is a defect that causes the device to fail at time t = 0 (final test). A latent defect (one that impacts chip reliability) is a defect that causes the device to fail at t > 0 (after burn-in). The relationship between killer defects (yield) and latent defects (reliability) stems from the observation that the same defect types that impact yield also impact reliability. The two are distinguished primarily by their size and where they occur on the device structure. Figure 1 shows examples of killer and latent defects that result in open and short circuits.
Figure 1. The same defect types that impact yield also affect reliability. They are distinguished primarily by their size and where they occur on the device’s pattern structure.
The relationship between yield and reliability defects is not limited to a few specific defect types; any defect type that can cause yield loss is also a reliability concern. Failure analysis indicates that the majority of reliability defects are, in fact, process-related defects that originate in the fab. Because yield and reliability defects share the same root cause, increasing yield (by reducing yield-related defects) will have the additional benefit of improving reliability.
The yellow line in figure 2 shows a typical yield curve. If we only consider chip yield, then at some point, further investment in this process may not be cost-effective and thus the yield tends to level off as time progresses. The blue dashed line in figure 2 shows the curve for the same fab making the same product. However, if they want to supply the automotive industry then they must also account for the costs of poor reliability. In this case further investment is warranted to drive down defect density even further, which will both increase yield and deliver the improved reliability required for automotive suppliers.
Figure 2. Yield curves (Yield versus Time) for different fab types. The yellow line is for non-automotive fabs where the major consideration is fab profitability. At some point the yield is high enough that it is no longer practical to continue trying to drive down defectivity. The blue dashed line is the yield curve that also factors in reliability. For IC products used in the automotive supply chain additional investment must be made to ensure high reliability, which is strongly correlated to yield.
The change from being a consumer-grade chip supplier to an automotive supplier requires a paradigm shift at the fab management level. Successful semiconductor manufacturers who supply the automotive industry have long adopted the following strategy: The best way to reduce the possibility of latent (reliability) defects is to reduce the fab’s overall random defectivity levels. This means having a world class defect reduction strategy:
- Higher baseline yields
- Lower incidence of excursions
- When excursions do occur, quickly find and fix them inline
- Ink out suspicious die using die-level screening
These and other strategies will be addressed in forthcoming articles in this Process Watch automotive series.
About the Authors:
Dr. David W. Price and Jay Rathert are Senior Directors at KLA-Tencor Corp. Dr. Douglas Sutherland is a Principal Scientist at KLA-Tencor Corp. Over the last 15 years, they have worked directly with over 50 semiconductor IC manufacturers to help them optimize their overall process control strategy for a variety of specific markets, including automotive reliability, legacy fab cost and risk optimization, and advanced design rule time-to-market BKMs. The Process Watch series of articles attempts to summarize some of the universal lessons they have observed through these engagements.
- Senftleben and Froehlich, Aspects of Semiconductor Quality from an OEM Perspective, April 2017.
- Price and Sutherland, “Process Watch: The Most Expensive Defect, Part 2,” Solid State Technology, July 2015.
- Riordan et al., “Microprocessor Reliability Performance as a Function of Die Location for a .25um, Five Layer Metal CMOS Logic Process,” 37th Annual International Reliability Physics Symposium Proceedings (1999): 1-11. http://dx.doi.org/10.1109/RELPHY.1999.761584
- Barnett et al., “Extending Integrated-Circuit Yield Models to Estimate Early-Life Reliability,” IEEE Transactions on Reliability, Vol. 52, No. 3., 2003.
- Shirley, “A Defect Model of Reliability,” 33rd Annual International Reliability Symposium, Las Vegas, NV, 1995.
- Kim et al., “On the Relationship of Semiconductor Yield and Reliability,” IEEE Transactions on Semiconductor Manufacturing, Vol. 18, No. 3, 2005.
- Roesch, “Reliability Experience,” Published lecture #12 for Quality and Reliability Engineering ECE 510 at Portland State University, 2013. http://web.cecs.pdx.edu/~cgshirl/Quality%20and%20Reliability%20Engineering.htm
- Shirley and Johnson, “Defect Models of Yield and Reliability,” Published lecture #13 for Quality and Reliability Engineering ECE 510 course at Portland State University, 2013. http://web.cecs.pdx.edu/~cgshirl/Quality%20and%20Reliability%20Engineering.htm
- Kuper et al., “Relation between Yield and Reliability of Integrated Circuits: Experimental results and Application to Continuous Early Failure Rate Reduction Programs,” Proceedings of the International Reliability Physics Symposium (1996): 17-21.