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Solid State Technology
A few lessons from ISS
It’s easy to think of the semiconductor industry as an anomaly in the history of business because, in fact, it is.
Replacing traditional TFT-LCD manufacturing with a lower-cost alternative that is also a more efficient technology is (forgive the pun) a bright idea that should be attractive to manufacturers.
Using ultrapure steam for water-contamination control
Multiple semiconductor and related processes-including diffusion, RTP, ALD, etch, and DUV lithography-currently use water vapor as part of manufacturing.
In situ chemical cleaning for improved ion implanter utilization
The overall utilization efficiency of production ion implanters is strongly influenced by the build up of solid deposits inside the vacuum system.
Addressing manufacturing variation at advanced nodes with silicon-contour-based DFM
Applying foundries’ recommended design rules can often raise design costs because many recommended design rules result in trade-offs, requiring designers to spend more time in verification.
Intel pushes lithography limits, co-optimizes design/layout/process at 45nm
This month, SST presents a preview of the March edition of Chip Forensics, an SST online column by Dick James, senior technology adviser at Chipworks, a specialty reverse engineering company that takes apart ICs and electronics systems in order to provide engineering information for its customers.
Wafer Level Packaging
Stepper technology enabling wafer-level packaging adoption
Driven by the needs for mobile personal electronics, wafer-level packaging (WLP) is now being used for many mainstream ICs.
Product Focus: Lithography
Scalable MEMS manufacturing
Traditionally, MEMS devices have been developed using a combination of custom design and manufacturing techniques in a select number of captive MEMS foundries or in one of the commercial specialty MEMS fabs that have sprung up in recent years.
Multilayer thin film barrier for protection of flex-electronics
Continuous evolution marks the electronics industry’s progress toward even thinner, lighter and more flexible products.
Deposition technology for TFT-LCD production savings
A flat panel deposition technology, which utilizes a rotary target arrangement instead of the traditional planar and is also applicable beyond Gen 8.5, is described. In addition to enabling manufacturing and materials cost reductions in pre-sputter qualification, target consumption is reduced and data is presented showing that thickness uniformity, sheet resistivity, and target erosion profiles comply with Gen 8.5 TFT requirements.
Emerging materials on the Roadmap for silicon-based IC systems
In general, emerging materials will augment silicon transistor technology by providing enhanced speed, lower-power consumption, improved heat dissipation, improved memory capacity/data retention, or added RF/analog functionality while maintaining the large scale integration capability of CMOS.
Cleaning Surface Prep
Damage-free cleaning and inspection of advanced multiple-gate FETs
Multiple-gate FETs incorporating narrow silicon fins have been investigated as an alternate to traditional CMOS technology.
High efficiency solar cells with printed Al-alloyed rear contacts
Processes have been developed to create n-type silicon cells on thin wafers with screen printed aluminum-alloyed rear junctions.
More important, more complex: MEMS metrology
Just as MEMS developers are waking up to the fact that metrology tools can add value to development and fabrication of MEMS devices, tool suppliers are facing the challenges-and opportunities-of serving an increasingly complex market.