Table of Contents

Solid State Technology

Year 2007
Issue 10



Myths of manufacturing

The biggest challenge the chipmaking industry faces when transitioning from go-it-alone strategies to collaborative models may come not from any external sources, but rather from internal misconceptions about the the extent to which best practices from other businesses apply to semiconductor manufacturing.

Emerging Technology

Interconnect: Future nodes look beyond copper

Although copper interconnects have become essential to the continuation of Moore’s Law, they too have limits.

Tech News

Technology news


SiP and SoC will remain co-existing system solutions

System-in-package (SiP) and system-on-chip (SoC) approaches provide different advantages for different end-market applications.

Vacuum Technology

Fifty years of vacuum technology marked by evolutionary advances

Vacuum technology is not often considered as leading semiconductor manufacturing.

World News

BUSINESS TRENDS: Analyst: MPUs recovering, DSPs still struggling

Industry Forum

DFM: What’s real now?

After nearly half a decade, design for manufacturing (DFM) has not provided the expected value to erstwhile users, in spite of the perceived need and vaunted advantages.



A methodology and system for automatic litho hot-spot repair

This paper describes a design-for-manufacturing (DFM) methodology and system for optimizing layouts to eliminate hot spots.


Accelerating semiconductor R&D with combinatorial technology

EXECUTIVE OVERVIEWHigh productivity combinatorial methods have been integrated with characterization systems and an informatics infrastructure to rapidly accelerate the pace of materials-based R&D.


Process monitoring and surface characterization with in-line XPS metrology

An X-ray photoelectron spectrometer (XPS) is used at 65nm and 45nm nodes to monitor nitrogen dose and the SiON thickness of ultra thin nitrided gate oxides as well as the thickness of amorphous silicon on top of an amorphous carbon stack.


An efficient low-defectivity process for 193nm resist development

Increased lithography cluster tool productivity is required to reduce the cost of ownership (COO) of today’s advanced 193nm processes.

Cover Article

Monitoring reciculated baths using NIR inline chemical analysis

Specialized chemical mixtures used in semiconductor processing are necessary for the surface preparation of wafers.