Table of Contents

Solid State Technology

Year 2002
Issue 8


Think Tank

Think Tank

The Building Lot


C-MAC Launches Integrated Opto Module Program

C-MAC MicroTechnology filled out its optoelectronic manufacturing technology portfolio and now offers an integrated assembly and test program for those applications


NEMI Announces Opto Projects

The National Electronics Manufacturing Initiative (NEMI) launched three new projects as part of its effort to "improve yields and decrease costs of optoelectronic assemblies and products."


Analysis Tools from Zuken Include Package Re-use

Zuken USA added a "packaging re-use" capability to its Packaging Predictor set of analysis tools

New Products

Product Preview

A two-axis noncontact measuring system combining quality control laboratory accuracy, repeatability and optical quality with ease of use, Kestrel incorporates the company's patented Dynascope optical projection technology, which provides high-contrast, high-resolution images of complex parts of various materials


APiA Adds Seven Members to Alliance

The Advanced Packaging and Interconnect Alliance (APiA) added seven organizations to its roster, increasing the scope of technologies included in its effort to address advanced packaging challenges


Growth Projections from SIA and VLSI Research

The Semiconductor Industry Association (SIA) gave its 2002 mid-year forecast, predicting a 3 percent growth in semiconductor sales in 2002 compared to 2001, reaching a total market of $143 billion


Materials Science to the Rescue

When asked to put together a presentation recently, I forced myself to take a close look at the latest version of the International Technology Roadmap for Semiconductors (ITRS)


Datacon Tops Equipment Rankings; Assembly Dominates Industry-wide List

Datacon Technology of Austria has topped this year's VLSI Research ranking of assembly equipment suppliers


Packaging of Cu/low-k Addressed at IITC

The annual International Interconnect Technology Conference (IITC) added advanced packaging as one of its focus topics this year


China Update: SEMI, Carsem, ChipMOS


Step By Step

The back-end process: Step 8
Flip Chip Underfill

The advantages of the flip chip package over other types of electronic packaging are many, but the most obvious is the reduction in the package size, which delivers savings in board real estate and product thickness.

10th Anniversary Insight

10th Anniversary Insights
The Evolution of Packaging Education

The first university course in packaging was offered nearly two decades ago, but the most significant changes in availability and breadth of university-level education programs have occurred in the past 10 to 15 years

Fast Moireacute Interfer

Fast Moiré Interferometry

Semiconductor manufacturers are pressured these days to decrease the size of components while increasing their functionality

Lithography For Advanced

Lithography for Advanced Packaging

With the evolution in front-end semiconductor technology and end product platforms, there is a need for further process development to package these products effectively