Table of Contents

Solid State Technology

Year 2002
Issue 2



Positive signs in the industry

Many people in the semiconductor industry have been waiting until the first quarter of 2002 to try to get some idea of where the industry is headed

Think Tank

Think Tank

Liz and Brenda live on opposite sides of the street, where there are an equal number of houses on each side


Cool Chips 2002 conference lineup

Portland, MAINE - Intertech has set the agenda for its conference, "Cool Chips 2002 - Developing New Market, Material and Design Strategies for Thermal and Power Management," which will be held April 3-4 in Monterey, California


New alliance to accelerate advanced packaging

A group of seven companies have begun a collaboration to accelerate the commercial development of advanced packaging technologies, such as wafer-level packaging (WLP)


Progress on wafer-level burn-in and test

Motorola Semiconductor Products Sector (SPS) has developed and qualified the industry's first wafer-level burn-in and test (WLBT) process for high-performance flip chip microprocessors


Wafer thinning development continues

The latest advance in the active area of wafer thinning was announced by ChipPAC


Johns Hopkins makes advances on optical interconnect

Optical interconnect has generated much interest over the years because of the performance benefits of transmitting signals at the speed of light rather than through copper wire or other solid conductors


The hot potato of test

Early this year I met with a number of packaging sub-contractors, and one theme that came up at virtually every one of them is the increasing importance of test in their business


The Back End Process Ste

The back-end process: Step 2 - Wafer bumping Low-alpha lead considerations

As a result of decades of manufacturing flip chip packages, there exists a large database of reliability information about lead solder bumps

Die Attach Solder Design

Die attach solder design

Calculation of phase diagrams for lead-free power IC die attach

Polyimide For Flip Chip

Polyimide for flip chip packaging

Improving image quality in photosensitive polyimide films

Micro Inspection For Waf

Micro inspection for wafer bumping

Inspection requirements for wafer-level packaging processes

10supth Sup Anniversary

10th Anniversary Insights
The wire-bonding tyranny of

Many industry luminaries today debate what will be the interconnect technology of choice for semiconductor devices in the future