Table of Contents

Solid State Technology

Year 2006
Issue 5


Notable Developments

Room-temperature Solder Bonding of Electronic Packages

Reactive bonding is a room-temperature process for soldering packages or components directly to boards without using a conventional solder reflow.

New Products

SEMICON West Product Preview

The AKU2000 surface-mountable complementary metal oxide semiconductor (CMOS) microelectromechanical systems (MEMS) microphone integrates an acoustic transducer, output amplifier, and 4th-order sigma-delta modulator in a single chip.

Editorial Board

PoP as a Preferred Packaging Solution

Package-on-package (PoP) has emerged asthe preferred 3-D packaging solution for integration of logic and high-performance memory devices in mobile multimedia products.

Industry Voices

What, I Need a Package?

A typical phone call to a package manufacturer begins with: “I have this chip, what package do you have that will fit?” Next comes the basic questions: “What size is your chip? How many pads does it have? Does it need to be hermetic? Do you want it to be surface mountable? Leaded? Ball grid array? Oh, and by the way, how fast does your chip operate?” Depending on the answer to the last question, everything else becomes moot.


In The News

SAN JOSE, CA - In response to the success of Technology Innovations Showcase (TIS), SEMI has expanded the idea, introducing TechXPOTs to SEMICON West 2006, July 11-14 at the Moscone Center in San Francisco, CA.

Advanced Packaging Road

Advanced Packaging Hits the Road

Advanced Packaging thought it was time for a fresh look at what’s really happening in the semiconductor packaging industry, so we’ve hit the road.


Focus on Flip Chips

Don’t you just love being right? It took a long time for flip chips to go mainstream, but now that they have made it, it’s very satisfying.


Flip Chip Attachment

Pulsed-laser Heating for Flip Chip Assembly

A stress-free alternative

The Back End Process

Underfill Technology

From Current to Next-generation Materials

Package Design

IC and Package Co-design

Dos and Don’ts of Wire-Bond Assembly

Wafer Bumping

Gold Ball Bumping

An Effective Wafer-Bumping Method

Opto Wlp Technology.html

Opto-WLP Technology

Wafer-level solutions for optical and sensor applications

Cover Story

Packaging for Improved Thermal Management

Reducing Thermal Resistance at Die Level