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Solid State Technology
Diversity and Standards
3D packaging has a bright future. It simply makes a lot of sense.
In The News
Sensata Technologies Develops a Latched Socket
ATTLEBORO, MA ??? Hideyuki Takahashi, Japan engineering manager, and Hide Furukawa, U.S. engineering manager at Sensata Technologies have developed a latch system for delicate IC packages.
Extending Leadframe Application Opportunities
Leadframe-based packages accounted for over 70% of the 147 billion IC packages produced in 2007.
Semicon West Product Preview
The Trouble with News
You would think that because I’m a National Public Radio junkie, news would be of vital importance to me – any type of news.
Who’s Who at BiTS, SEMICON China and IMAPS Device Packaging Symposium
The Advanced Packaging editors covered a lot of ground this spring as co-sponsors of the Burn-in and Test Socket (BiTS) Workshop in Mesa, AZ, attending SEMICON China in Shanghai, and the IMAPS Device Packaging Symposium in Scottsdale, AZ.
The Back End Process
Choosing the Best Bump for the Buck
Flip chip interconnect offers the advantages of smaller footprint on the PCB, improved electrical performance, reduced manufacturing steps at assembly, and excellent long-term reliability.
Inside 3d Packaging
Flash Memory for Stacked PoP Technology Issues and Test Challenges
Flash memory has become a fundamental building block in modern electronic systems.
Cleaning High-power Electronics A closed-loop SOlvent-Based Approach
Flux residues must be be removed from flip chip components prior to subsequent processes to prevent malfunctions in high-power electronics.
Creating Wireless SiP Solutions
While CMOS SoC works well in low power applications, it doesn't meet requirements for future wireless products.