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Solid State Technology
Managing particle flows in process exhaust for safety and profitability
Solid particles in the abatement exhaust must be properly managed, and in some cases, substantially reduced from the gas stream before it is released into the environment.
van der Pauw and Hall voltage measurements with a parameter analyzer
van der Pauw measurements with a parameter analyzer are examined followed by a look at Hall effects measurements.
What is your China strategy?
Equipment vendors have a lot on their plates now, with memory customers pushing 3D NAND, foundries advancing to the 7 nm node, and 200mm fabs clamoring to come up with hard-to-find tools.
Reducing ESD in semiconductor fluoropolymer fluid handling systems while maintaining chemical purity
Fluoropolymer Electrostatic Discharge (ESD) tubing reduces electrostatic charge to levels below the ignition energy of flammable semiconductor chemicals and maintains chemical purity, ensuring safety and improving process yields.
Preview: 2016 IEEE International Electron Devices Meeting
The 62nd annual IEDM will be held in San Francisco December 3 - 7, 2016.
GLOBALFOUNDRIES extends FDX roadmap with 12nm FD-SOI technology
GLOBALFOUNDRIES today unveiled a new 12nm FD-SOI semiconductor technology, extending its leadership position by offering the industry\\\\\\\'s first multi-node FD-SOI roadmap.
Lam Research introduces dielectric atomic layer etching capability for advanced logic
Lam Research Corp., an advanced manufacturer of semiconductor equipment, today announced that it is expanding its atomic layer etching (ALE) portfolio with the addition of ALE capability on its Flex dielectric etch systems.
TowerJazz and SMIC’s sales forecast to surge in 2016
Total pure-play foundry market expected to jump 9% this year, up from 6% growth in 2015.
Fab equipment spending ascending
Expect 4% growth (YoY) for 2016 and 11% for 2017
The ConFab 2017, May 14-17, in San Diego
I’m delighted to announce that The ConFab, our premier semiconductor manufacturing conference and networking event, will be held at the iconic Hotel del Coronado in San Diego on May 14-17, 2017. For more than 12 years, The ConFab, an invitation-only executive conference, has been the destination for key industry influencers and decision-makers to connect and collab- orate on critical issues.
CMOS image sensor update
Toshiba was the first to commercially implement CMOS image sensors with backside TSV last technologies in 2007. Many of us stated in 2007 that further advances could be obtained by removing the CMOS circuitry to a separate layer and forming a true 3D chip stack, but the technology imple- mentation had to wait while the industry first converted to back side imaging technology.
3D-NAND deposition and etch integration
Lam talks about process control and default roadmaps.
Moore's Law did indeed stop at 28nm
As we have predicted two and a half years back, the industry is bifurcating, and just a few products pursue scaling to 7nm while the majority of designs stay on 28nm or older nodes.