Laser debonding for ultrathin and stacked fan out packages
Fan-out packaging is an established technology for many mobile applications. Whereas early semiconductor packages have been single-chip packages, the continuing trend of expanding the wiring surface to support increased functionality has led to more complex packages, stacked packages, systems inpackageaswellashigh-performancepackages. With this development, fan-out technology is bridging a gap between cost-competitive packaging and high performance.
Overcoming challenges in 3D NAND volume manufacturing
As 3D NAND becomes the mainstream technology, its challenging roadmap poses opportunities for continued innovation.
In-line metrology for characterization and control of extreme wafer thinning of bonded wafers
In-line metrology methods used during extreme wafer thinning process pathfinding and development are introduced.
Enhanced vacuum security using advanced sub-fab monitoring and data analytics
Sub-Fab Fault Detection and Classification (FDC) software platforms collect, integrate and analyze operational data.
The pervasiveness of ASICs in the IoT era
For an increasing number of designs, companies are finding it beneficial to design their own ASICs with system-on-a- chip (SoC) complexity. For reasons of cost reduction, quality improvement, IP protection and security, a full turn-key ASIC can be achieved for $1-5 million, particularly if the design can be built using mature technology nodes.
NASA’s new vacuum-channel nanoelectronics rely on Park Systems AFM
Using scanning capacitance microscopy with a Park Systems atomic force microscope a team at NASA successfully characterized both the spatial variations in capacitance as well as the topography of vacuum-channel nanoelectronic transistors.