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3D NAND Flash Process Integration and Architecture from A to Z

April 24, 2018 at 1:00 p.m. ET

Since 2006, many of new 3D NAND Flash cells have been proposed and commercialized on the market. Already, we have seen 3D NAND cell structure up to 64L/72L with single or multi-stack NAND string architecture. The memory density on Micron/Intel’s 64L 3D NAND 256 Gb/die reached 4.40 Gb/mm2 (256 Gb/die). In this session, we’ll overview 3D NAND Flash roadmap, products, cell design, structure, materials and process integration. The 3D NAND cell architecture from major NAND manufacturers including Samsung TCAT V-NAND, Toshiba/Western Digital BiCS, SK Hynix P-BiCS and Micron/Intel FG CuA will be reviewed and compared. Current and future technology challenges on 3D NAND will be discussed as well.

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Artificial Intelligence and Machine Learning in Semiconductor Manufacturing: The Rise of Computational Process Control

Thursday, May 17, 2018 at 1:00 p.m. ET

The increased use of artificial intelligence (AI) and machine learning (ML) techniques such as deep learning is creating a myriad of both challenges and opportunities for enhancements in manufacturing in terms of improved capacity, quality, and efficiency. The semiconductor industry poses somewhat unique challenges arising from its complex, high precision and highly dynamic production environment. One key way that these challenges are being addressed in semiconductor is by using an approach called “computational process control” or “CPC” in which AI and ML are combined with subject matter expertise to provide higher quality analytical solutions. This webcast will look at the AI/ML explosion, what it means to the semiconductor industry, and how CPC is being used to enhance the benefits of these analytical techniques.

Sponsored By:
Interconnects

Date and time TBD

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

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TECHNOLOGY PAPERS



Leveraging Baseline Checks for Robust Reliability Verification

As IP and IC designers and verification teams tackle increased complexity and expectations, reliability verification has become a necessary ingredient for success. Automotive, always-on mobile devices, IOT and other platforms require increasingly lower power envelopes and reduced device leakage while maintaining overall device performance. Foundries have also created new process nodes targeted for these applications. Having the ability to establish baseline checks for design and reliability requirements is critical to first pass success. January 08, 2018
Sponsored by Mentor Graphics

Testing PAs under Digital Predistortion and Dynamic Power Supply Conditions

The power amplifier (PA) – as either a discrete component or part of an integrated front end module (FEM) – is one of the most integral RF integrated circuits (RFICs) in the modern radio. In Part 2 of this white paper series, you will learn different techniques for testing PAs via an interactive white paper with multiple how-to videos.September 06, 2017
Sponsored by National Instruments

Learn the Basics of Power Amplifier and Front End Module Measurements

The power amplifier (PA) – as either a discrete component or part of an integrated front end module (FEM) – is one of the most integral RF integrated circuits (RFICs) in the modern radio. Download this white paper to learn the basics of testing RF PAs and FEMs via an interactive white paper with multiple how-to videos.May 22, 2017
Sponsored by National Instruments

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