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Silicon wafer revenues decline in 2012

February 12, 2013

Worldwide silicon wafer revenues declined by 12 percent in 2012 compared to 2011, according to the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry.

Sponsored By:
KIC
Progress in Printed Electronics: An Interview with PARC’s Janos Veres

January 31, 2012

Solid State Technology editor Pete Singer caught up with Janos Veres, area manager for printed electronics in the electronic materials and devices laboratory at PARC.

Sponsored By:
KIC
imec advances CMOS beyond silicon to Ge, III-V

December 14, 2011

Marc Heyns, fellow at research consortium imec, discusses the group's work on chip fab materials beyond silicon, namely, Ge and III-V, presented in "Advancing CMOS beyond the silicon roadmap with germanium and III-V devices" at IEDM.

Sponsored By:
KIC
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WEBCASTS


Interconnects

June 2015 (Date and time TBD)

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

Sponsored By:
Understanding Defects

July 2015 (Date and time TBD)

Yield improvement and production engineers working on today's ICs encounter many challenges as defects affecting device operation go undetected by traditional in-line techniques. Electrical Failure Analysis (EFA) is a suite of techniques that helps the modern day fab increase yields by isolating faults to areas small enough for Physical Failure Analysis (PFA). In this Webinar, we showcase a few of the proven EFA fault isolation techniques and describe how EFA helps to characterize the underlying defects.

Sponsored By:
Lock-in Thermography for Advanced Assembly Qualification

August 2015 (Date and time TBD)

Increasing IoT business opportunities drive a need for new packaging techniques such as FOWLP, Embedded Component Packaging, etc. Such new assembly techniques allow more components and functionality to be integrated into an ever decreasing package space. In parallel the faster product cycle drives the need for faster production ramp to stay competitive. All these challenges highlight the need for a better methodology to determine root cause of assembly-related defects during the new package process qualification process. We will demonstrate a totally non-destructive fault localization method based on a lock-in thermography with examples in these areas.

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