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Silicon wafer revenues decline in 2012

February 12, 2013

Worldwide silicon wafer revenues declined by 12 percent in 2012 compared to 2011, according to the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry.

Sponsored By:
KIC
Progress in Printed Electronics: An Interview with PARC’s Janos Veres

January 31, 2012

Solid State Technology editor Pete Singer caught up with Janos Veres, area manager for printed electronics in the electronic materials and devices laboratory at PARC.

Sponsored By:
KIC
imec advances CMOS beyond silicon to Ge, III-V

December 14, 2011

Marc Heyns, fellow at research consortium imec, discusses the group's work on chip fab materials beyond silicon, namely, Ge and III-V, presented in "Advancing CMOS beyond the silicon roadmap with germanium and III-V devices" at IEDM.

Sponsored By:
KIC
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WEBCASTS


Wet Processing

July 2014 (date and time TBD) Wet processing including wafer cleaning, is one of the most common yet most critical processing step, since it can have a huge impact on the success of the subsequent process step. Not only does it involve the removal of organic and metal contaminants, but it must leave the surface in a desired state (hydrophilic or hydrophobic, for example), with minimal roughness and minimal surface loss – all on a growing list of different types of materials. In this webcast, experts will identify industry challenges and possible solutions.

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450 Update

July 2014 (date and time TBD) The switch to 450mm will likely be the largest, most expensive retooling the semiconductor industry has ever experienced. Will you be ready? 450mm fabs, which will give an unbeatable competitive advantage to the largest semiconductor manufacturers, are likely to cost $10 billion and come on-line in 2017, with production ramp in 2018. Unprecedented technical challenges still need to be overcome, but work is well underway. This webcast will provide an update on the current status of activities, key milestones and schedules, and the status of 450mm research on processes and devices.

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Metrology

August 2014 (date and time TBD) Continued scaling and more complex device structures, including FinFETs and 3D stacking, are creating new challenges in metrology and inspection. Smaller defects must be detected and analyzed on an increasingly diverse set of materials. Chip makers are looking for better wafer edge inspection techniques, higher resolution metrology tools, 450mm-capability and new compositional analysis solutions.

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