By Jeff Dorsch
Everybody loves FinFETs!
Well, not everybody, really, is behind double-gate or multiple-gate field-effect transistors. There is a camp in the semiconductor industry making the case for the leading alternative, using fully-depleted silicon-on-insulator technology. On balance, however, most chipmakers are betting on the chips with the tiny “fins.”
There’s also some disagreement and fudging on what is and isn’t a FinFET process. It’s not a precisely defined term for many people. Intel, for instance, was a leader in implementing the architecture, but it doesn’t use the word “FinFET,” preferring to describe its architecture as a “3-D Tri-Gate transistor.”
Intel started using the Tri-Gate architecture at the 22-nanometer process node and now is employing it at 14nm.
Taiwan Semiconductor Manufacturing, the world’s largest pure-play silicon foundry, is using FinFETs at the 16nm process node. The foundry has introduced its 16nm FF+ process, a second-generation FinFET technology.
“Most of the major manufacturers are doing FinFETs,” says Aaron Thean, vice president of process technology and director of logic development at imec. “Everyone is transitioning to FinFETs. The industry is moving in that direction.”
Brian Trafas, chief marketing officer of KLA-Tencor, says, “Most companies chose FinFET.” With his company’s emphasis on process control and yield management, KLA-Tencor knows about some of the struggles in implementing FinFET architectures. There is some residual contamination with the etching and cleaning process steps, according to Trafas. This often takes the form of “very small residue on the sidewall of fins,” he says.
What about fully-depleted silicon-on-insulator? “FD-SOI can help with some of the scaling,” Trafas says. It is, however, what he describes as “a niche area.”
STMicroelectronics has been the industry champion of FD-SOI technology, and that’s been a lonely position, for the most part, although it continues to collaborate with CEA-Leti and Soitec on implementing the technology. GlobalFoundries committed to using ST’s FD-SOI tech for 28nm and 20nm production in 2012, and expects to put it into volume production by the end of this year, for 28nm and 14nm processes.
In May, STMicroelectronics announced that Samsung Electronics would use ST’s 28nm FD-SOI tech for foundry customers. Samsung plans to offer the process in early 2015.
“The agreement [for 28nm FD-SOI] confirms and strengthens further the business momentum that we have experienced on this technology during the past quarters through many customers and project engagements in our embedded processing solutions segment,” ST Chief Operating Officer Jean-Marc Chery said in a press statement. “We foresee further expansion of the 28nm FD-SOI ecosystem, to include the leading EDA and IP suppliers, which will enrich the IP catalog available for 28nm FD-SOI.”
Meanwhile, process technologists are planning for FinFETs at 10nm, 7nm, and 5nm. Beyond that, it’s anyone’s guess what architecture will prevail.