04/02/2015 C3Nano, Inc., a developer and supplier of solution-based, transparent conductive inks and films announced today that it has entered into a partnership with Kimoto, Ltd. Japan.
03/31/2015 A new product from Mentor Graphics called Xpedition® Package Integrator provides a new methodology and platform in addition to a new suite of EDA tools. The platform enables chip, package and board designers to easily see how changing various design elements impact adjacent designs, an industry first.
03/26/2015 Aart de Geus is not running for governor of California.
03/06/2015 Global mobile phone display module shipments in 2015 are expected to rise just 4 percent year-over-year to reach two billion units, leading to even stronger competition among mobile phone display manufacturers.
03/05/2015 With much of future demand for silicon ICs forecasted to be for mobile devices that must conserve battery power, it was natural for much of the focus at the just concluded 2015 International Solid State Circuits Conference (ISSCC) in San Francisco to be on ultra-low-power circuits that run on mere microWatts (µW).
03/04/2015 Taking “Smart Design from Silicon to Software” as his official theme, Aart de Geus urged attendees to “shift left” – in other words, “squeezing the schedule” to design, verify, debug, and manufacture semiconductors.
03/03/2015 Organic light emitting diodes (OLEDs), which are made from carbon-containing materials, have the potential to revolutionize future display technologies, making low-power displays so thin they'll wrap or fold around other structures, for instance.
02/27/2015 Exposures, and reducing their cost, were a theme running through the 2015 SPIE Advanced Lithography Symposium this week in San Jose, Calif., the center of Silicon Valley.
02/27/2015 In lithography for manufacturing semiconductors, a negative tone can be a positive attribute.
02/25/2015 At this week’s SPIE Advanced Lithography Symposium in San Jose, Calif., the hottest three-letter acronym is less EUV and more DSA, as in directed self-assembly.
02/25/2015 The two main camps in optical lithography are arrayed for battle at the SPIE Advanced Lithography Symposium. EUVt lithography, on one side, is represented by ASML Holding, its Cymer subsidiary, and ASML’s EUV customers, notably Intel, Samsung Electronics, and TSMC. On the other side is 193i immersion lithography, represented by Nikon and its customers, which also include Intel and other leading chipmakers.
02/23/2015 Speakers at the plenary session of the SPIE Advanced Lithography conference covered a wide variety of topics, from photonics to 3D chips to the Internet of Things, on Monday morning, February 23, in San Jose, Calif.
02/23/2015 Nikon and KLA-Tencor put on separate conferences in San Jose, Calif., on Sunday, February 22, tackling issues in advanced optical lithography. The overarching theme in both sessions was the increased complexity of lithography as it approaches the 10-nanometer and 7nm process nodes.
02/04/2015 The SEMICON Korea conference and exhibition opens Wednesday in Seoul for a three-day run. The show highlights the importance of semiconductor manufacturing in South Korea, home to two of the biggest memory chip makers in the world, Samsung Electronics and SK Hynix.
01/29/2015 Increasing sizes of display panels for TVs, smartphones, mobile PCs and automotive displays are driving increases in total flat-panel-display area demand growth.
01/28/2015 Before there were electrical engineers and standard definitions for the ampere, ohm and volt, entrepreneurs and scientists in the United Kingdom and the United States worked on the issue of improving communications between the Old World and the New World.
01/20/2015 The recent restructuring by major global lighting companies will allow LED makers to raise capital for investments in 2015.
01/08/2015 Scientists at UCL, in collaboration with groups at the University of Bath and the Daresbury Laboratory, have uncovered the mystery of why blue light-emitting diodes (LEDs) are so difficult to make, by revealing the complex properties of their main component - gallium nitride - using sophisticated computer simulations.
01/05/2015 In another example of the old one-liner that “all that is old is new again,” the old technique of solid-source doping is being used by Intel for a critical process step in so-called “14nm node” finFET manufacturing.
12/16/2014 At the 60th annual International Electron Devices Meeting this week in San Francisco, there was much buzz about the 14-nanometer FinFET papers being presented by IBM and Intel. Those papers were the subject of a press release two months in advance.
October 26, 2016 at 1 p.m. ET / Sponsored by Air Products
With the change in the traditional IC scaling cadence, the expansive growth of “Big data,” and the pervasive nature of computing, rises a paradigm shift in integrated circuit scaling and microelectronic devices. The pervasive nature of computing drives a need for connecting billions of people and tens of billions of devices/things via cloud computing. Such connectivity effect will generate tremendous amount of data and would require a revolutionary change in the technology infrastructures being used to transmit, store and analyze data. Heterogeneous integration through package with technologies such as system in package (SIP), on package integration (OPI) and fan-out (WLFO and PLFO) are poised to change the packaging industry and play a disruptive role in enabling next generation devices.
November 17, 2016 at 1:00 p.m. ET / Sponsored by Astronics
Moore’s Law scaling can no longer maintain the pace of progress just when we need it most. Data, logic and applications are migrating to the cloud, consumerization of data and the rise of the Internet of Things are placing new demands and they are all occurring at the same time. Difficult challenges in power, performance, latency, bandwidth density, security and cost threaten our ability to maintain the progress that has enabled the growth of information technology. Meeting these challenges will require reduction in power and cost per function by a factor of 104 over the next 15 years while improving performance and decreasing latency. Only a revolution in packaging through Complex 3D-SiP can provide a solution. This will require new tools for design and simulation, new packaging architectures, production processes, materials, and equipment. The difficult challenges and potential solutions will be discussed.
XwinSys recently launched the ONYX - a novel in-line and non-destructive hybrid metrology system, uniquely integrating advanced XRF, 2D and 3D optical technologies, designed to meet the current and future metrological challenges of the semiconductor industry. The unique hybrid configuration of the ONYX enables a solution to challenging applications through various analytical approaches and effective SW algorithms.July 06, 2016Sponsored by XwinSys Technology Development Ltd.
Microelectromechanical systems (MEMS) present both unique market opportunities and significant manufacturing challenges for product designers in nearly every application segment. Used as accelerometers, pressure sensors, optical devices, microfluidic devices, and more, these microfabricated sensors and actuators often need to be exposed to the environment, but also need to be protected from environmental factors. Although standard semiconductor manufacturing methods provide a baseline capability in meeting these challenges, the unique requirements of MEMS devices drive a need for specialized epoxies and adhesives able to satisfy often-conflicting demands.May 12, 2016Sponsored by Master Bond, Inc.,
XwinSys identified the semiconductors recent market trends and developed a novel XRF technology, named NMT: Noise-reduced Multilayer Thin-film measurement. This innovative approach can be used for in-line inspection and metrology features, to accurately and precisely analyze single and multi-layered elements in ultra-thin films. NMT novel technology can be utilized for in-line applications ranging from localized ultra-thin film stacks to the inspection of 3D localized features to the analysis of defects involving geometries, voids and material elements. February 23, 2016Sponsored by XwinSys Technology Development Ltd.