Pete's Posts Blog

Is the Semiconductor Industry Ready for Industry 4.0 and the IIoT?

An industrial revolution is in the making, equivalent some say to the introduction of steam power at the tail end of the 18th century. Known as smart manufacturing, Industry 4.0 (after the German initiative Industrie 4.0), the industrial internet of things (IIoT), or simply the fourth industrial revolution, the movement will radically change how manufacturing is done.
The first industrial revolution was based on water/steam, the second was due electricity, and the third was from automation.

Industry 4.0 F2

The semiconductor industry is sure to benefit by the “digitization” of manufacturing in that it’s an important component of the IoT explosion, along with smart homes, smart cities, smart health, etc. But is the semiconductor manufacturing industry – already one of the most advanced in the world – ready for the revolution? Will the cobbler’s children get new shoes?
I believe it will, but there are some major roadblocks that need to be overcome.

New innovation is required for a couple of reasons. First, the path to continued cost reduction through scaling has come to an end. The industry will continue to push to smaller dimensions and pack more functionality on a single chip because the world will always need super-advanced electronics for data servers, cloud computing and networking. But it’s looking to be an increasingly expensive proposition.

At the same time, the industry is looking to the Internet of Things explosion as the “next big thing.” The two most important aspects of IoT devices will be low power and low cost. Speaking at a press conference at Semicon Europa in October, Rutger Wijburg, Senior VP and General Manager Fab Manufacturing for GlobalFoundries put things in perspective: “The wave of the Internet of Things is building. There will be a massive wave with tens of billions of devices. What is very important for our industry is that the two waves that have been driving our industry for a very long time – computers and mobile – are slowing down.” He noted that the IoT represents massive volume, but it doesn’t need the most advanced technology. “What it needs are two things: low power and low cost,” he said.

Wijburg said a typical figure of merit in the mobile space is $0.25/mm2. “My estimation is that the massive volume going into the Internet of Things has to be delivered for ASPs (average selling price) between $0.05 and $0.10/mm2.

Industry 4.0 F3

How to bring the cost per square mm of silicon down by at least 5X from where it is today? “One of the things that the industry has done extremely well with is finding new ways of innovation to bring down the cost of the next node. That has actually been driving the Law of Moore for many, many years,” he said. “But at this moment, we are at a point where it doesn’t work anymore,” Wijburg said.

One solution outlined by Wijburg is FDSOI technology, which he said is less expensive than FinFETs and has other advantages as well. GlobalFoundries introduced a 22nm FD-SOI platform in July that will largely be manufactured at the plant in Dresden, Germany.

Beyond that, it’s like that some other kind of major innovation will be required to reduce costs. Work is underway to fabricate various kinds of electronics with printing with, for example, roll-to-roll inkjet printing. Indeed, a conference dedicated to printed electronics was co-located with Semicon Europa. But it’s likely that this technology will limited to relatively low-tech and novel devices (i.e., electronic tattoos).

Could the Industry 4.0 movement enable a dramatic reduction in costs? It’s possible, but it will take some time.

In a recent report, McKinsey defines Industry 4.0 as digitization of the manufacturing sector, with embedded sensors in virtually all product components and manufacturing equipment, ubiquitous cyberphysical systems, and analysis of all relevant data. It is driven by four clusters of disruptive technologies. The first consists of data, computational power, and connectivity – low-power, wide-area networks are one example. Analytics and intelligence form the second, while human-machine interaction is the third, comprising, for instance, touch interfaces and augmented reality. Digital-to-physical conversion is the fourth: advanced robotics and 3D printing are two examples.

Proponents of Industry 4.0 say greater connectivity and information sharing — enabled by new capabilities in data analytics, remote monitoring and mobility — will lead to increased efficiency and reduced costs. There will be a paradigm shift from “centralized” to “decentralized” production. There will also be greater efficiency across the supply chain, and more companies involved in the supply chain, providing services such as security.

Industry 4.0

I know what you’re thinking. The semiconductor industry embraced all these things years ago. It’s the poster child for this kind of thing!

Sadly, there’s a long way to go to realize the kind of data sharing and “digitization” embodied in the Industry 4.0 concept. “The set of problems getting to 4.0 is profound,” said Nick Ward, director, marketing service group, Applied Global Services, Applied Materials. Ward, who presented on the topic at Semicon Europa, said data collection is not the issue in that the semiconductor industry has been collecting data for a long time, with a 40% increase node-to-node. “The MES is constantly being asked for more granularity and higher speed,” he said.

The challenge is that the industry has been extremely secretive, to the point where people entering the fab aren’t allowed cell phones with cameras.

Ward said the industry will need to change how it thinks about IP. There needs to be a new data structure that allows it to be shared in some way, with “broad brush” IP treated differently than what’s really important.

“Industry 4.0 is about marginal gains,” Ward said. “It’s not about ‘give me all your data.’”

What we really need is a map that includes process data, design data and financial data, Ward said.

He pointed to the open innovation models presently being explored by companies such as GE, GM and Ford as something the semiconductor industry should consider.

Update: The day after this was posted, Mentor Graphics introduced new tools for Industry 4.0, although targeted at the PCB industry (which is not as secretive as the semi industry).

Additional reading: Industry 4.0 — Opportunities and Challenges of the Industrial Internet

IoT Surveys Indicate Optimism, Confusion

Solid State Technology recently conducted a survey of our readers on how the Internet of Things (IoT) is driving the demand for semiconductor technology. A total of 303 people responded to the survey. A majority of the respondents were in management roles.

Survey questions focused on their expectations for growth in the Internet of Things (IoT), drivers, potential roadblocks, opportunities and impact on semiconductor technology, including manufacturing and packaging.

There is little agreement on how strongly the IoT device market will grow. About a quarter of the respondents said, by 2020, 30-50 billion devices would be connected to internet with unique urls. Almost as many were much more optimistic, saying more than 90 billion.

A sizable majority of the respondents (59.41%) believe new companies will emerge to benefit from the growth in IoT. Existing companies will also benefit, with MEMS companies benefitting the most.

A majority of the respondents said the existing supply chain and industry infrastructure was not equipped to handle the needs of the IoT or said they weren’t sure. Similarly, most said new manufacturing equipment and new materials will be needed for IoT device manufacturing.

My take on this is that while the market potential for companies involved in IoT devices is large, there is little agreement on exactly how large it might become.

I believe it’s also likely that new companies will emerge focused specifically on manufacturing IoT devices. Existing companies across the supply chain will also benefit.

Clearly, IoT devices will create new challenges, especially in the area of packaging. Form-factor, security and reliability are the most important characteristics of IoT devices.
Another recently completed survey on the IoT by McKinsey & Company and the Global Semiconductor Alliance (GSA) revealed some ambiguity about whether the IoT would be the top growth driver for the semiconductor industry or just one of several important forces.

The survey of executives from GSA member companies showed that they had mixed opinions about the IoT’s potential, with 48 percent stating that it would be one of the top three growth drivers for the semiconductor industry and 17 percent ranking it first.

IoT, Healthcare and 5G to Drive RF and Microwave

Imagine the world in 2020, only five years from now. If predictions hold true, more than 50 billion devices will be connected to the Internet (creating the Internet of Things), through smart homes, smart cities, smart factories, smart everything. Two recent Cisco studies show there’s $19 trillion in IoT value is at stake in the private ($14.4 trillion) and public ($4.6 trillion) sectors. The studies see, for example, $2.5 trillion in value from better use of assets, improving execution and capital efficiency, and reducing expenses and cost of goods sold. In 2020, cars could be driving themselves and people could be monitoring their health through a variety of smartwatches and other wearables. And, of course, smartphones will continue to proliferate.

5G could also become a reality as early as 2020 (some estimate it will be later, perhaps 2025). Carriers’ base stations can handle hundreds of simultaneous users now, but that’s not enough to accommodate the billions of new devices that will hook into the Internet of Things. Some estimate that equipment makers will need to increase base station connectivity capacity by a factor of 1,000.

RF and microwave electronics are also becoming more valuable. Consider RF chips in smartphones. Instead of 30-40 cents for RF chips in a 2G phone, chipmakers will see $2 to $3 in a lower-end 3G smartphone. It then rises to $4 to $6 for a mid-tier LTE smartphone and $10-plus for high-end global LTE smartphones. No estimate yet on 5G smartphones, but it’s sure to be more.

These trends are good news for everyone involved in technologies associated with RF, microwave, millimeter wave, and THz frequencies, many of whom will be attending “Microwave Week” in Phoenix, May 17-22.  Besides the flagship IEEE MTT-S International Microwave Symposium (IMS), Microwave Week also hosts the IEEE RFIC and ARFTG conferences.

Microwave Week 2015 will start with RFIC Symposium, and followed by IMS Symposium, Microwave Historical Exhibit and ARFTG Microwave Measurement Conference.

The RFIC Symposium kicks off Sunday evening with the awards ceremony followed by two plenary speakers: Dr. Peter H. Siegel from Jet Propulsion Laboratories will talk on “From THz Imaging to Millimeter-Wave Stimulation of Neurons: Is there a Killer Application for High Frequency RF in the Medical Community?” He’ll be followed by a talk by Dr. Hermann Eul of Intel titled “RF as the Differentiator.”

On Monday at the IMS Symposium, University of Illinois’ Swanlund Chair Professor John Rogers will deliver the plenary session address. This kicks off a week of more than 160 technical sessions that indicate industry growth at the intersection of RF and microwave technologies with health.

Dr. Rogers’ opening keynote, “Soft Assemblies of Radios, Sensors and Circuits for the Skin,” will focus on the experimental and theoretical approaches for using soft materials, ultrathin micro/nanostructures and controlled processes of mechanical buckling to achieve ultralow modulus systems of semiconductor devices. The resulting skin-like technology has the potential to provide clinical-quality health monitoring capabilities for use outside of traditional hospital settings and laboratory facilities.

“Rogers sets the precedent for bridging the gap between research and real-world application,” said Vijay Nair, IMS symposium general chair. “His expertise allows him to provide deep insight into how technological innovation can result in significant opportunities for the microwave industry and for society as a whole.”

Closing IMS2015 on Thursday, May 21 is Agilent Technologies’ Chief Technology Officer and Senior Vice President Dr. Darlene Solomon, who will present her vision for how breakthroughs in cellular biology will enable advances in biology-based engineering in her talk, “The Century of Biology is Great for Engineering.”

“Solomon’s holistic approach to the application of technology to address societal issues offers a unique perspective to illustrate the great opportunities ahead for RF and microwave engineers,” said Nair.

The focus of the ARFTG 85th Microwave Measurement Conference; Automatic RF Techniques Group (ARFTG) on May 22nd, will be “Measurements and Techniques for 5G Applications.”

IoT and The ConFab 2015

I’m delighted to announce the keynotes and other key speakers for The ConFab 2015, to be held May 19-22 at The Encore at The Wynn in Las Vegas.

Our first keynote, on Wednesday, will be Ali Sebt, President and CEO of Renesas America, who will provide his insight on monetizing the Internet of Things. He’ll discuss how intelligent and connected platforms will enable new value chains based on a platform play, or an associated ecosystem play.

Our second keynote, on Thursday, will be Paolo Gargini, Chairman of the ITRS. The newly “re-framed” ITRS roadmap process has been extended with studies of key requirements from a system-level perspective that includes heterogeneous integration, new revolutionary devices and new ways of physical and wireless connectivity. Paolo will describe what is known as the ITRS 2.0.

Also slated to speak is Subramani Kengeri, Vice President, Global Design Solutions at GLOBALFOUNDRIES, who will talk about how the design eco-system is a critical enabler for semiconductor growth. Subi says that the rapid evolution of applications in the consumer and mobile space coupled with the emergence of the IoT are driving innovations that push the limits of power, performance, cost, and time-to-volume. At the same time, next generation SoCs are demanding stronger design and technology co-optimization solutions—some of which are optimal in main-stream technologies—to support complex design integration functions.

Lode Lauwers, Vice President Business Development, at imec will continue the IoT theme, focusing on how it is driving technology trends on system scaling and semiconductor manufacturing effectiveness. Lode says to realize the promises of an augmented, connected sustainable world, promised by the IoT, the IC industry faces significant challenges both at a distributed level, with the development of ultralow power sensor and radio technologies, as well as in the cloud, with huge computational requirements to store and process data.

Jim Feldhan, president of Semico, will present the outlook for key components of the IoT market.  Wearables, electronic health care, smart home, cities and cars all promise to be high volume semiconductor markets. What will these markets look like? What are some the enabling technologies necessary to make IoT a reality? Come to The ConFab 2015 and find out! See for more info.

Reframing the Roadmap: ITRS 2.0

The International Technology Roadmap for Semiconductor (ITRS) is being reframed to focus more on end applications, such as smartphones and micro-servers. Labeled ITRS 2.0, the new roadmap is a departure from a strong focus maintaining the path defined by Moore’s Law. The original ITRS was published in 1992 at the National Technology Roadmap for Semiconductors; it became the ITRS in 1998.

In an IEEE paper published late last year titled “ITRS 2.0: Toward a Re-Framing of the Semiconductor Technology Roadmap,” the roadmappers explain why it’s time for a change. “As new requirements from applications such as data center, mobility, and context-aware computing emerge, the existing roadmapping methodology is unable to capture the entire evolution of the current semiconductor industry. Today, comprehending how key markets and applications drive the process, design and integration technology roadmap requires new system-level studies along with chip-level studies.”

The ITRS roadmapping committee has already been reorganized to focus on ITRS 2.0. There are now seven groups focused on what ITRS chairman Paolo Gargini calls the seven “building blocks.”

  • System Integration—studies and recommends system architectures to meet the needs of the industry. It prescribes ways of assembling heterogeneous building blocks into coherent systems.
  • Outside System Connectivity—refers to physical and wireless technologies that connect different parts of systems.
  • Heterogeneous Integration—refers to the integration of separately manufactured technologies that in the aggregate provide enhanced functionality.
  • Heterogeneous Components —describes devices that do not necessarily scale according to “Moore’s Law,” and provide additional functionalities, such as power generation and management, or sensing and actuating.
  • Beyond CMOS—describes devices, focused on new physical states, which provide functional scaling substantially beyond CMOS, such as spin-based devices, ferromagnetic logic, and atomic switch.
  • More Moore—refers to the continued shrinking of horizontal and vertical physical feature sizes to reduce cost and improve performance.
  • Factory Integration consists of tools and processes necessary to produce items at affordable cost in high volume.

Gargini, who will be delivering a keynote at address at The ConFab 2015, said he it was clear that the ITRS needed to change in 2010 when tablets were gaining much traction. “By 2012, I outlined to the ITRS groups that we were going to change. 2013 was a hybrid year where we were putting together the building blocks for the new environment. Then in 2014, that’s what we had done exclusively.”


A revised ITRS was not released at the end of 2014, as has historically been the case. Gargini said the groups have been preparing white papers which should be released early this year. We’ll be publishing summaries in Solid State Technology, so stay tuned.

Exponentially Rising Costs Will Bring Changes

Scott McGregor, President and CEO of Broadcom, sees some major changes for the semiconductor industry moving forward, brought about by rising design and manufacturing costs.

Speaking at the SEMI Industry Strategy Symposium (ISS) in January, McGregor said the cost per transistor was rising after the 28nm, which he described as “one of the most significant challenges we as an industry have faced.”

He said that in the past, it was a “no brainer” for a design company to move its entire set of products always forward to the next generation. “Every generation would be better than the previous one. It would be faster, it would be lower power, it would be more cost effective,” he said.  “We think we’re now seeing this come to a bottom.” The reason for increasing transistor cost is the complexity of the devices, and the cost of the equipment required to produce them. McGregor said these costs are going up exponentially. “Those exponential factors are now starting to drive the cost forward. This is going to drive some change,” McGregor predicted.


Chip design cost is also increasing exponentially. McGregor showed a chart with dramatically increasing cost for each process node for such things as software, prototyping, validation, verification and IP qualification per process node.


McGregor also pointed out that the semiconductor industry as a whole is maturing. He said we have moved from a new market phase with double digit growth into an evolving market with high single digit growth to now a stabilizing market with mid-single digit growth year-on-year.


Although mature, the industry will still see some volatility, although less than in the past. “supply is easily overridden and it takes a long time to build some of these devices like scanners so that’s going to create volatility,” he said.

He also predicted that SoCs would become even more pervasive. He used a set top boxes as an example, noting that they used to be full of boards crammed with lots of discrete parts. “Today, if you open up a set top box, you’ll see a relatively small circuit board inside with a large chip that integrates almost all the functionality,” he said. “The box is still the same size because consumers perceive value in the size of the box, but it’s mostly air inside.”

McGregor said the tapeout costs to do a single device are very high. “You have to put $100 million into a semiconductor startup today to be able to get to productization.” This means that big companies will be getting bigger. “There will still be some small companies – but I think the mid-sized company in our industry, in devices, is going to dramatically go away because of the scale and other things required,” he said.

A big impact of these changes is that the process node selection is going to change. “Instead of immediately going to the next node, you’re going to stay in nodes longer. That means, for example, that 28nm is going to be a very long-lived node. There are a lot of things that probably will not make sense to move beyond 28nm for a long time. It will not automatically mean you should go to 16 or 14nm, or 10nm. There will be relatively few devices that economically make sense to do that,” he said.

He noted that Broadcom crossed the threshold where software engineers outnumbered software engineers a number of years ago and now has “significantly more” software engineers than hardware engineers. “That’s an interesting transition because we’re now delivering systems instead of just chips. The value just doesn’t come from the transistors — It comes from all the other pieces put together. One of the challenges for us as an industry is getting paid for that. Unfortunately, for many of us, the software is the ‘gift wrap” for the chip rather than something we can monetize,” he said.

Semiconductor Materials: Growth, Opportunities and Challenges

Don’t miss this week’s webcast on Thursday at 1:00 pm Eastern, 10:00am Pacific.

We have two great speakers lined up. First, Lita Shon‐Roy, President/CEO of Techcet, will provide an overview of chip level materials markets, focusing on growth and opportunities. Next, SRC’s Jon Candelaria, Director, GRC Interconnect and Packaging Sciences, will describe how today’s researchers are exploring materials challenges beyond Moore’s Law.

Click here to register.

Here are some more details:

Lita will talk about how current 3-dimensional structures present new challenges relating to uniformity, lithographic resolution, high aspect ratio etching and fills, and planarization while addressing continuing need to stay at or below current technology node scaling.  What do these challenges really mean in terms of changing material requirements and materials growth opportunities?  In her presentation, Lita will highlight those processes that must have better, alternative process materials, and provide market forecasts on these materials opportunities.

In his presentation, Jon will focus on how the electronics industry is facing a growing crisis in being able to continue providing cost-effective processes and designs to support the continuation of what’s been referred to as ‘Moore’s Law.’ This ‘Law’, or more accurately ‘observation of the economics involved in scaling integrated circuits,’ has been a very useful guideline for several decades, but as with any similar types of projections, has been expected to some day run its course. While the exact timeframe is still uncertain, that ‘day’ is now within sight, and yet there are still no clear paths forward beyond that point. This presentation will provide a brief glimpse of some of the key materials-related challenges that exist within the frontend (devices), lithography, and backend-of-line (chip level interconnects). It will also include just a few of the research concepts that offer some potential paths forward, which the Semiconductor Research Corporation and its member companies are exploring alongside the university researchers they are supporting.

And speaker bios:


Lita Shon‐Roy, President/CEO of Techcet, has worked in the electronics materials industry in business development and technical marketing for more than 25 years. Her work experience spans from business development, marketing and sales of IC’s, equipment, and materials to process development of flat panel displays (TFTs). She has developed new business opportunities for companies such as RASIRC/Matheson Gases and IPEC/Speedfam and helped establish marketing and sales proficiency in companies such as Air Products/Schumacher, Brooktree/Rockwell, and Hughes Aircraft. Lita helped build IPEC as a leader in CMP equipment as Director of International Sales. In 1998, Lita cofounded Techcet Group, LLC. She has authored and co‐authored various articles and texts focused on the semiconductor processing, industry forecasting, and the world economy and is now a recognized expert in electronic materials marketing and business development. Lita holds a Master’s Degree in Electrical Engineering, with a specialty in Solid State Physics from USC and a Bachelor’s Degree in Chemical Engineering from UCSD. She is currently completing her MBA at California State University, Dominguez Hills.


Jon Candelaria, Director, GRC Interconnect and Packaging Sciences

Jon Candelaria has over 35 years of experience in the electronics industry in a wide variety of engineering and managerial roles. He was most recently a Distinguished Member of the Technical Staff at Motorola’s Applied Research & Technology Center before joining the SRC in September, 2010 as the Director for Interconnect and Packaging Sciences. He has over a dozen issued patents and published technical articles, and received the Motorola Patent of the Year Award for an invention which contributed over $1B to Motorola over the course of its lifetime. He served as Technical Program Chair and General Chair of the IEEE Electron Devices Society’s flagship conference, the IEDM. Jon was the V.P. of Conferences for the IEEE’s Electron Devices Society (EDS), the EDS representative on a joint United Nations-IEEE Humanitarian Challenge advisory committee, and was Chair of both the IEEE Computer Society and Laser and Electro Optics Society Phoenix Chapters. He is currently the Treasurer and Technical Program Committee member for the International Interconnect Technology Conference (IITC), and is a member of the Editorial Panel for Future Fabs International.

Don’t Hack My Light Bulb, Bro

The age of the Internet of Things is upon us. It’s about all anyone talked about over the last few weeks, as I visited the TSMC Open Innovation Platform (Sept 29th), ARM TechCon (October 1-2) and Semicon Europa (Oct 7-9).

I think Rick Cassidy, Senior VP of TSMC and president of TSMC North America, captured most people’s feelings when he kicked off the TSMC OIP saying: “The IoT is hot, it’s hot, it’s really hot.” Pete Hutton, ARM Executive VC, speaking at the ARM TechCon a day later, said “ IoT is a very, very exciting area for us and a very, very exciting area for the industry.”

There are, of course, two aspects of IoT. One is at what you might call the sensor level, where small, low power devices are gathering data and communicating with one another and the “cloud.” The other is the cloud itself. “IoT devices are expanding fast. There’s vast innovation going on in the space. It’s innovation driven by a range of people. A range of people from very large multi-nationals all the way to small groups of engineers in a garage. That innovation is going to create lots of opportunities. It’s also going to create massive volumes of data. Massive amounts of small data rippling through the network, rippling through the infrastructure.”

There is a lot to think about at both levels – how sensors will be integrated with batteries, energy harvesting devices, networking/connectivity capabilities, etc. on the one hand, and how servers will need to change and adapt to process massive amounts of data in the cloud and the “edge” of the cloud on the other.

What I found interesting in listening to many speakers over the last couple of weeks is how many people believe that the lowly light bulb might be how the IoT makes it’s way into your home. Light bulbs  have a ready energy source, they are in every room of your home and if they’re LEDs, they already have some computer functionality built in (through the driver chip). Yes, the NEST smoke detector has grabbed the headlines lately, but it’s probably the light bulb that will win.

Of course, this needs to be easy to use. As Simon Segar noted in his keynote talk at ARM TechCon, you don’t want to unlock your phone, find an app and click on it to turn on the light when you walk into a room. Nor do you want to have your light bulb talk to a server in Norway before it communicates with the thermostat (or your fridge/toaster/smoke detector/washing machine).

And you don’t want your light bulb hacked.  At SEMICON Europa, I sat in on a presentation titled “Secure Connections for The Internet of Things” by Dr. Wouter Leibbrandt, Senior Director, Manager Systems & Applications, Central R&D CTO, NXP. He said that while some parts of the IoT, such as banking, are very secure, the various parts are not well connected. There is considerable vulnerability through devices such as an internet-connected light bulb that would allow hackers to broach your system and gain access to sensitive documents and perhaps even bring down your whole system (or hold it for ransom).

How big the IoT is going to get is anyone’s guess. At the ARM TechCon, ARM founder and CTO Mike Muller said there could be 50 billion devices connected to the internet by 2020. A week later, at a SEMI press conference, Claus Schmidt, managing director, Robert Bosch Venture Capital GmbH, said he’d heard 80 billion.

Clearly, the IoT is going to be huge. But security, even at the light bulb level, is going to be critical.

Editor’s Note: My muse for the headline.. On September 17, 2007, U.S. Senator John Kerry – now Secretary of State — addressed a Constitution Day forum at the University of Florida in Gainesville. A student, Andrew Meyer, became agitated during a subsequent Q&A and was arrested. During arrest, the officers asked him repeatedly to stop resisting, but Meyer continued to struggle and scream for help. While six officers held Meyer down one of the officers stunned him with a Taser following Meyer’s shouted plea to the police, “Don’t tase me, bro!” The YouTube video went “viral” and now has more than 7 million views.

Can we take cost out of technology scaling?

There is much talk these days about continued scaling, including some recent posts by my colleague Ed Korczynski, in “Moore’s Law is Dead” Part 1 (What?) and Part 2 (When?). At The ConFab in June, keynote speaker, Dr. Gary Patton, vice president, semiconductor research and development center at IBM, talked about scaling, adding some historical perspective. I previously blogged about the “three fundamental shifts” that Patton believes will lead to a bright future for the semiconductor industry.

“We will keep scaling,” he said. “We have shown a tremendous ability to innovate and keep moving that technology forward.”

In the 1990s, Patton notes that life was actually pretty simple. “You brought in a new lithography tool, you scaled the horizontal dimensions, you scaled the vertical dimensions and you got a new technology out. It was better performance, the same power density, and you could do a lot more on the chip,” he said.


Around 2000, we hit the gate oxide limit. “Gate oxide got to be abount three atomic layers. We could have said at that point ‘game over, scaling has ended.’ But guess what, we innovated. We came up with a pretty fundamental shift in ideas which is let’s change the fundamental properties of silicon. If we can strain the silicon, we can enhance the mobility. We can change the gate oxide. We can enhance the coupling between the gate and the channel. And that’s what we get over that last decade. We said let’s go from SRAM to a very high performance eDRAM (embedded DRAM) so we can put a lot more memory next to the processor because we knew memory was a key gating factor for the processor speed. This enabled the personal computing era and smart consumer electronics,” Patton said.

In 2010, we were at another one of these inflection points. “It’s not surprising that the improvements in 20nm are less than people would like because we really reached the end of the planar device era. Again, we were saying ‘game over, we’re done scaling.’ But no, we continue to innovate. The next decade is really about 3D. 3D devices, finFETs, or 3D chip integration,” he added.

Patton said that design technology co-optimization will be a key piece of getting through the next decade. “That will probably take us to about 2020,” he said. At that point we’re going to “hit the atomic dimension limit and we’re going to have to do it all over again. Here, we’re going to get into nanotechnology. Nanowire devices, silicon nanowires, carbon nanotubes, photonics and multi-chip stacking to bring things together. That will enable wearable computing, everywhere connectivity and cognitive computing.”

Patton said the problem is not physics. “We’re going to have solved the physics problems,” he said. “The problem is financial.” Patton showed a chart (below) that depicted the history of our industry from 1980 to present. “What drove the industry was smaller features, which enabled better performance and better cost per function. It enabled new types of applications, and that enabled larger markets. If you look in this time period, there’s about a six order of magnitude improvement in cost per transistor and that enabled a seven order of magnitude increase in consumption of silicon transistors,” he said.


The challenge we’re facing right now is depicted below, showing the compound growth rate reduction and the cost of a circuit. On the x-axis is linear scaling. “We’ve typically targeted about a 0.7X linear scaling, which means from an area perspective, you get about 50% improvement. Note the line, 50%, doesn’t go through 50% improvement because with each new technology, there is some increase in complexity. It might be more like 30% improvement at the die level. If we’re really good and provide some enhancements in the technology, self-aligned processes, things like that, we may get it to 40%. So 30-40% is about the range we’ve been getting in terms of the cost per die improvement as we scale up.


“The challenge we’re facing now is two fold. Number one, we’re struggling to get that 0.7X linear scaling. It might be about 0.8X. And we’re adding a lot more complexity, especially when you adding double and triple patterning .The focus today in innovation has got to be heavily focused on ‘how do we drive cost?’ Not just how do you scale, because scaling would add a lot of extra cost at this point. How do we drive cost down, how do we keep adding value to the technology. The model is changing. Moore’s Law can still hold, but we have to focus on the cost equation. So there’s really two parts. Technology innovation which is focusing on the patterning, focusing on the materials, the processing, and how do we drive that to take cost out of the technology scaling,” Patton said.