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The New Driver for Semiconductor Tech

Over the past 40 years, the electronics industry has gone through three distinct stage or “waves” of evolution. Last year, in a Solid State Technology webcast presentation, Intel’s Islam Salama described the waves and how the latest wave is driving the semiconductor industry in new and very different ways. Dr. Salama is responsible for packaging substrate pathfinding of high density interconnects across all Intel products. His team focuses on packaging substrate architectures, process and materials technology building blocks, intellectual property management, and manufacturing ecosystem development.

The first wave occurred in the 1990s, driven mainly by personal computers and enterprise servers. The 2000s saw the very wide adoption of smartphones and cellular phones. “This really provided a very solid platform for industry growth, Salama said.

But today, a major shift is under way. “Starting in 2010, we started to see a generational shift in the IT architecture. This shift is really reshaping every aspect of our economy and industry, and defining the opportunities that are available for growing the industry moving forward,” he said. This shift – you guessed it – is driven smart devices, cloud computing and the IoT.

“As we experience pervasive computing behavior, we demand consistency and seamless interface among all our devices as we use them throughout the day,” Salama said. “It becomes a cycle. The more pervasive computing becomes, the more demand there is on the cloud and the data center.  In the process, you create new application and you try to come up with new devices that keep up with the applications, and the cycle feeds on itself.”

The IoT will bring an explosion of data.

The IoT will bring an explosion of data.

Big and small data being generated by the IoT and smartphones is seen as the next big disrupter. In Wave 2 (the 2000s), PCs generated 90 MB/day and smartphones 30MB/day. In Wave 3, the numbers jump dramatically. A connected car, for example, will generate 4TB of data/day, a connected plane, 40TB/Day and a connected factory 1 PB/Day (petabyte (PB) is 1015 bytes of data).

“Such an explosion of data, driven by our behavior as consumers and the emergence of new applications, will really challenge the infrastructure of the entire network as we know it today,” Salama said.

For example, all the sophisticated data analytics that are performed today at the data center need to be pushed downstream. This is particularly true for applications that will become very sensitive to data latency, for example, such as autonomous driving or connected hospitals.

“This is really shaping the future to be concentric around big data, and this is the main reason why data is being viewed today in the industry as the next disruptor and the engine for driving the semiconductor and the information and computing technology moving forward,” Salama said.

Etch Abatement Needed at 200mm Fabs to Meet WSC Goals for 2020

I’m delighted to turn the blog over again to Mike Czerniak, Environmental Solutions Business Development Manager at Edwards. A longtime champion of the environment, Mike, nominated by the UK Department of Energy and Climate Change (DECC), was just been accepted as the ‘expert witness’ on CF4 for the forthcoming Intergovernmental Panel on Climate Change (IPCC) working party on emissions of this extremely long-lived gas (50,000 years).

Etch Abatement Needed at 200mm Fabs to Meet WSC Goals for 2020

By Mike Czerniak, Edwards

Mike Czernial, Edwards

Mike Czerniak, Edwards

The World Semiconductor Council (WSC) is comprised of the semiconductor industry associations (SIAs) of the United States, Korea, Japan, Europe, China and Chinese Taipei. Its goal is to promote international cooperation in the semiconductor sector in order to facilitate the healthy growth of the industry from a long-term, global perspective. Formed in 1996, the WSC early on recognized the industry’s obligation to responsibly manage its impact on the environment.

One of the council’s first acts was the issuing of a voluntary industry target to reduce the emission of perfluorinated compounds (PFC) to 10 percent below their 1995 levels by 2010. PFCs are significant greenhouse gases (GHG) and many can persist for extended periods in the atmosphere. Given the significant growth of the semiconductor industry over this 15 year period, this was a very aggressive goal. By the end of the period, all member SIAs were able to report that they had met, and in many cases, significantly exceed the stated goal. This rather impressive achievement was accomplished by two key efforts. The first was the replacement of traditional CF4 and C2F6 CVD cleaning gases with NF3, which readily dissociates in a plasma to provide fluorine, an effective cleaning gas, which, though toxic, is not a greenhouse gas. The second was the widespread adoption exhaust gas abatement.

In 2011 the industry set new targets for 2020, which it summarizes as:

  • The implementation of best practices for new semiconductor fabs. The industry expects that the implementation of best practices will result in a normalized emission rate (NER) in 2020 of 0.22 kgCO2e/cm2, which is a 30 percent NER reduction from the 2010 aggregated baseline.


  • The addition of “Rest of World” fabs (fabs located outside the WSC regions that are operated by a company from a WSC association) in reporting of emissions and the implementation of best practices for new fabs.
  • NER based measurement in kilograms of carbon equivalents per area of silicon wafers processed (kgCO2e/cm2), which will be the single WSC goal at the global level.


The original 2010 target focused primarily (and successfully) on emissions from chemical vapour deposition (CVD) processes. The main area for potential improvement now, as illustrated by the figure below, is etch, especially in older 200mm fabs where etch processes may not have been fitted with PFC abatement devices. This is particularly true for etch processes making extensive use of CF4, which has a very high global warming potential over a 100-year timescale (GWP100) of 7350, due largely to its atmospheric half-life of 50,000 years. It is extremely stable.

Figure 1. Global warming potential as carbon equivalent (in Kg) per year per 20,000 wafer starts per month. Etch processes are now the major opportunity to reduce harmful emissions in pursuit of WSC 2020 goals.

Figure 1. Global warming potential as carbon equivalent (in Kg) per year per 20,000 wafer starts per month. Etch processes are now the major opportunity to reduce harmful emissions in pursuit of WSC 2020 goals.

Some are predicting a prolonging of the productive lifetimes of 200mm fabs in conjunction with projected growth as a result of the growing market for internet of things (IoT). Many IoT devices do not require cutting-edge production technology and can be economically produced in older fabs. In any case, the onus is on our industry to continue our efforts to reduce any adverse effects on the environment we all share.

10 Reasons to Attend The ConFab this June

The ConFab Conference and Networking Event will be held June 12-15. Presented by Solid State Technology, this executive-level event is designed exclusively for those driving growth and innovation in the semiconductor industry. With a theme the “New Age of Innovation for Semiconductors,” it features deep insights on the challenges and opportunities facing the industry and also offers powerful networking opportunities. Here are my top 10 reasons to register now.

  1. The keynotes. Hear from Dr. Thomas Caulfield, senior vice president and general manager of the GlobalFoundries’ latest leading-edge 300mm semiconductor wafer manufacturing facility; Sunny Hui, senior vice president of worldwide marketing, Semiconductor Manufacturing International Corp., and Bill McClean, President of IC Insights.
  2. Dynamic networking. A big part of The ConFab is the networking. There are plenty of opportunities to get together at breakfast, lunch and for evening receptions. The semiconductor industry has undergone unprecedented consolidation over the last year and the only way to know who’s who in the new landscape it to get out and talk to people.
  3. Strategic business meetings. We arrange strategic meetings between technology suppliers and manufacturers, including IDMs, foundries and OSATs. Fabless companies, which are increasingly driving manufacturing decisions, are also involved.
  4. The big picture. You’ll walk away with a high level overview of the myriad of challenges and opportunities now facing the semiconductor industry. In our first session, speakers will include Dan Armbrust, CEO and co-founder, Silicon Catalyst; Lode Lauwers, VP, Business Development, imec; Kevin Gibb, Editor for the Research Division at TechInsights; Hughes Metras, VP Strategic Partnerships N.A., CEA Leti; and Mark Reynolds, Senior Director Industry Development, New York Empire State Development.
  5. Why new thinking is required for IoT innovation. The semiconductor industry needs to change the way it thinks about innovation, both technical innovation and business model innovation, especially when it comes to the Internet of Things (IoT). A panel session of experts and visionaries will discuss IoT’s role in various applications, how it will require investments in gateways, networks, servers and data analysis computers, and why IoT is the new big driver for semiconductor technology. Panelists include Uday Tennety, Director, Strategic Engagements and Innovation, GE Digital; Rajeev Rajan, Vice President of Product for Internet of Things, GlobalFoundries; Kelvin Low, Foundry Marketing, Samsung SSI; and Tim Hewitt, Director of Industry Solutions at Siemens. Come and ask questions!
  6. Fab Management. Today’s fab managers face a long list of everyday concerns and long term challenges. They must continually be thinking of ways to improve operational efficiency, optimize asset utilization, boost tool and worker productivity (and safety), increase throughput, maximize yield and reduce defectivity. A session will focus on this issues, with a focus on real, hands-on solutions. Speakers will include: Sanchali Bhattacharjee, Technology Strategist: Component Supply Chain, Intel; Ardy Sidwha, Sr. Director, Innovation & Technology (R&D) at QuantumClean; Rick Glasmann, Senior Director and Managing Director FE Operations Temecula; and Mike Czerniak, product marketing manager at Edwards.
  7. System Level Integration: New Directions in Packaging. System level package innovation and heterogeneous integration encompass a wide range of technologies, including module and 3D packaging, system-in-package (SiP), fanout, and embedded technologies. But questions remain. How will these technologies be utilized in advanced data centers & network systems, in future smart phones, and the growing medical, industrial and lifestyle IoT applications? A session, sponsored and organized by IEEE’s CPMT Society, will look at how packaging technologies are enabling innovative solutions that achieve system application requirements while maximizing system level performance, and, meeting cost, performance, form factor and reliability goals.
  8. China. With the “Made in China 2025” initiative, China is aiming to improve the self-sufficiency rate for ICs in the nation to 40% in 2020, and boost the rate further to 70% in 2025. What will be key is how Chinese companies can gain access to 16/14nm, 10nm, and 7nm technologies as well as DRAM and 3D NAND technologies. China is also planning to be global leader in 5G, with test development in 2018 and initial broadband deployment in 2020. This session will examine how the China “wild card” and increased M&A activity designed to bring advanced technology into China is a true game-changer for the worldwide semiconductor industry. Following SMIC’s Sunny Hui’s keynote, presenters will include Ed Pausa from PricewaterhouseCoopers and Jimmy Goodrich, Vice President, Global Policy, Semiconductor Industry Association. Bill McClean will also discuss China in his talk.
  9. Great location. The ConFab will take place at the beautiful Encore at The Wynn right in downtown Las Vegas.
  10. Collaboration. It’s clear that the need for real collaboration has never been greater. At The ConFab, industry leaders will gather to tackle tough questions, take a look at the new post-consolidation landscape, network in a unique environment and collaborate on the future.

Register now by contacting Sally Bixby at Complimentary passes are available to qualified VIPs. You can also check out The ConFab website. I hope to see you there!

Does Consolidation Put Innovation at Risk?

Consolidation in the semiconductor industry continues apace, with more than $100 billion in mergers and acquisitions announced in 2015, and more to come in 2016. “With our industry growth rates being so low, it’s a lot cheaper to acquire market share than it is to invest and beat your competitor over the head,” said analyst Bill McClean, speaking at SEMI’s Industry Strategy Symposium (ISS) in January.

ISS 2016

One potentially negative impact of consolidation is reduced innovation, said Ivo J. Raaijmakers, Chief Technology Officer and Director of R&D at ASM International, speaking at ISS on consolidation in the equipment supplier market. “The tail has been cut off. A lot of innovation happens in this tail,” he said. “The question we have to ask ourselves is how can be ensure efficient innovation in such a consolidating landscape of equipment suppliers?”

The is compounded by exponentially increasing complexity and R&D spending. The diversity in the number of materials used is also increasing rapidly. This is important, since it most future innovations will require the use of these new materials.

“More and more innovations are needed per node, per year,” Raaijmakers said. “Life was easy in the ‘60s, ‘70s and ‘80s. In the ‘90s, there were silicides added. In the 2000s, there were tantalum oxides, spin-on glasses and copper and low k. In 2010, we had high k and metal gate. We had porous low k materials, new barriers, SOI coming in. in 2015, we saw a lot of materials used for patterning. In 2020, we will attack the channel material, going from silicon to germanium to III-V materials and all associated materials.”

ISS 2016 F2

Raaijmakers provided an equation that captures the mathematics of innovation:

dI/dt α I x η/τ

where I is the number of innovations being worked on: loosely relates to R&D budget

η is the average success rate: what fraction of projects are successful, and

τ is the time constant: how long does it take from innovation to production

Since R&D budgets are fixed at about 15% of the overall revenue, the only two knobs to turn are the success rate and affect the time constant. “We are in deep trouble,” he said, “unless we manage η and τ.”

Raaijmakers noted that industry consolidation lowers the number of innovation projects. At the same time, success rate decreases with complexity as does development time.

The time factor does not offer much potential. On average, most successful innovations take 7-10 years from concept to high volume manufacturing. “Can we decrease this by collaboration along the value chain?” Raaijmakers asked. “I think it will be difficult and if you can do it, it will not be a huge gain.”

On the other hand, there’s much to be gained by the other factor, which is increasing the efficiency. “Collaboration along innovation chain can significantly lower the risk of adoption. Are we all working on the right things to push through into manufacturing. How quick can you narrow down choices?” said Raaijmakers. He added the such collaboration may increase the speed, but that’s not the major effect.

Collaboration across the chain increases R&D leverage and improves efficiency. “That means that two parts in the supply chain are not doing competing things or different things. They are working on one solution which is the solution for the industry.”

He said successful companies will bring R&D much closer to the fab and high volume manufacturing, but while not forgetting R&D. “You have to be good at taking things into volume production and supporting it there. And you have to be good in R&D. Maintaining those two traits is not so easy, he said.

The First Degree – Ominous Threshold Reached

In light of the Paris climate talks going on this week, I’m delighted to turn this blog over to a guest blogger, Mike Czerniak. Mike is the Environmental Solutions Business Development Manager at Edwards, and has been working in the semiconductor industry for more than 30 years. In 2014, he received SEMI’s Merit Award for his work on the Energy Saving Equipment Communication Task Force responsible for developing new standards designed to help reduce energy consumption in production equipment.

The First Degree – Ominous Threshold Reached as World Leaders Meet in Paris to Discuss Global Warming – Again

By Mike Czerniak, Environmental Solutions Business Development Manager, Edwards

The Met Office, the UK’s official office of meteorology, recently announced that, based on data acquired over the first 9 months of the year, 2015 is likely to be the first year in which the average global temperature exceeds by more than 1°Celcius (C), the average temperature for preindustrial years before we began to burn significant amounts of fossil fuels. Although the annual average temperature will fluctuate from year to year, the overall upward trend is well established and +1°C average temperatures are likely to become the norm. This is halfway to the 2°C threshold — at which most scientists agree damaging consequences are likely to occur, including the possibility of runaway warming in which no amount of reduction in industrial emissions would be able to reverse the trend. 2014 was the warmest year on record and 2015 looks to be even warmer. Reaching this ominous threshold should give new impetus to world leaders meeting this month (COP21) in Paris to attempt, once again, to reach an agreement on how best to address the issue of global warming.

It has been nearly 20 years since the signing of the Kyoto Protocol in which 192 countries committed to a real effort to reduce the industrial emission of greenhouse gases (GHG), which the protocol explicitly acknowledged as the cause of global warming. It was not until 2010 that the same group of nations recognized the 2°C threshold as the maximum acceptable increase in global temperature. The meeting in Copenhagen the previous year, where there was an attempt to force limits on individual countries, was largely a failure. At this year’s meeting in Paris the focus has shifted to securing voluntary reduction commitments from participants. Unfortunately, a UN analysis of commitments submitted prior to the meeting concluded that they would result in an unacceptable increase of 2.7°C. Still, there is room for optimism. The political climate has shifted significantly in favor of emission limits, particularly in the world’s two largest emitters, the US and China. Also, technological advances have significantly reduced the cost of renewable energy sources, such as solar and wind.

Our own industry, semiconductor manufacturing has shouldered its share of the responsibility. While we are not a major contributor to overall GHG emissions, we have made good progress in limiting our emissions of perfluorocarbon (PFC) gases, particularly powerful GHGs. In 1999, the World Semiconductor Council (WSC) agreed to reduce PFC emissions by at least 10% by the end of 2010. In actuality, we far surpassed this goal, achieving a reduction of 32% for the period. In 2011, the WSC announced a new voluntary PFC agreement for the next 10 years. The goals of the new program include an additional 30% reduction by 2020 in the normalized emission rate expressed as kilograms of carbon dioxide equivalent (CO2e) per square centimeter of processed silicon.

At Edwards, we are committed to playing a leadership role in the field of vacuum pumping and abatement by applying technology, products and services to benefit the environment for future generations. Over our products’ lifecycle we are in fact carbon equivalent negative. In a typical year our own operations, our supply chain’s and our customers’ operation of our equipment might generate 2 million tons of CO2e. In that same year, our abatement equipment will remove 6 million tons of CO2e. The net result is the removal of 4 million tons of CO2e from the environment. We strive constantly to reduce the energy intensity of our manufacturing operations and the energy consumption of our products. We have programs in place to reduce waste, both by eliminating landfill waste and by promoting the reuse of our products through service and remanufacture, and to reduce our own consumption of electricity by the increasing use of energy-efficient LED lighting in our facilities. And we seek every opportunity to reduce water usage.

We are extremely proud of our record of successful and conscientious environmental stewardship and it will continue to receive the highest priority at all levels of our organization.

Mike Czerniak, Edwards

Mike Czerniak, Edwards

Is the Semiconductor Industry Ready for Industry 4.0 and the IIoT?

An industrial revolution is in the making, equivalent some say to the introduction of steam power at the tail end of the 18th century. Known as smart manufacturing, Industry 4.0 (after the German initiative Industrie 4.0), the industrial internet of things (IIoT), or simply the fourth industrial revolution, the movement will radically change how manufacturing is done.
The first industrial revolution was based on water/steam, the second was due electricity, and the third was from automation.

Industry 4.0 F2

The semiconductor industry is sure to benefit by the “digitization” of manufacturing in that it’s an important component of the IoT explosion, along with smart homes, smart cities, smart health, etc. But is the semiconductor manufacturing industry – already one of the most advanced in the world – ready for the revolution? Will the cobbler’s children get new shoes?
I believe it will, but there are some major roadblocks that need to be overcome.

New innovation is required for a couple of reasons. First, the path to continued cost reduction through scaling has come to an end. The industry will continue to push to smaller dimensions and pack more functionality on a single chip because the world will always need super-advanced electronics for data servers, cloud computing and networking. But it’s looking to be an increasingly expensive proposition.

At the same time, the industry is looking to the Internet of Things explosion as the “next big thing.” The two most important aspects of IoT devices will be low power and low cost. Speaking at a press conference at Semicon Europa in October, Rutger Wijburg, Senior VP and General Manager Fab Manufacturing for GlobalFoundries put things in perspective: “The wave of the Internet of Things is building. There will be a massive wave with tens of billions of devices. What is very important for our industry is that the two waves that have been driving our industry for a very long time – computers and mobile – are slowing down.” He noted that the IoT represents massive volume, but it doesn’t need the most advanced technology. “What it needs are two things: low power and low cost,” he said.

Wijburg said a typical figure of merit in the mobile space is $0.25/mm2. “My estimation is that the massive volume going into the Internet of Things has to be delivered for ASPs (average selling price) between $0.05 and $0.10/mm2.

Industry 4.0 F3

How to bring the cost per square mm of silicon down by at least 5X from where it is today? “One of the things that the industry has done extremely well with is finding new ways of innovation to bring down the cost of the next node. That has actually been driving the Law of Moore for many, many years,” he said. “But at this moment, we are at a point where it doesn’t work anymore,” Wijburg said.

One solution outlined by Wijburg is FDSOI technology, which he said is less expensive than FinFETs and has other advantages as well. GlobalFoundries introduced a 22nm FD-SOI platform in July that will largely be manufactured at the plant in Dresden, Germany.

Beyond that, it’s like that some other kind of major innovation will be required to reduce costs. Work is underway to fabricate various kinds of electronics with printing with, for example, roll-to-roll inkjet printing. Indeed, a conference dedicated to printed electronics was co-located with Semicon Europa. But it’s likely that this technology will limited to relatively low-tech and novel devices (i.e., electronic tattoos).

Could the Industry 4.0 movement enable a dramatic reduction in costs? It’s possible, but it will take some time.

In a recent report, McKinsey defines Industry 4.0 as digitization of the manufacturing sector, with embedded sensors in virtually all product components and manufacturing equipment, ubiquitous cyberphysical systems, and analysis of all relevant data. It is driven by four clusters of disruptive technologies. The first consists of data, computational power, and connectivity – low-power, wide-area networks are one example. Analytics and intelligence form the second, while human-machine interaction is the third, comprising, for instance, touch interfaces and augmented reality. Digital-to-physical conversion is the fourth: advanced robotics and 3D printing are two examples.

Proponents of Industry 4.0 say greater connectivity and information sharing — enabled by new capabilities in data analytics, remote monitoring and mobility — will lead to increased efficiency and reduced costs. There will be a paradigm shift from “centralized” to “decentralized” production. There will also be greater efficiency across the supply chain, and more companies involved in the supply chain, providing services such as security.

Industry 4.0

I know what you’re thinking. The semiconductor industry embraced all these things years ago. It’s the poster child for this kind of thing!

Sadly, there’s a long way to go to realize the kind of data sharing and “digitization” embodied in the Industry 4.0 concept. “The set of problems getting to 4.0 is profound,” said Nick Ward, director, marketing service group, Applied Global Services, Applied Materials. Ward, who presented on the topic at Semicon Europa, said data collection is not the issue in that the semiconductor industry has been collecting data for a long time, with a 40% increase node-to-node. “The MES is constantly being asked for more granularity and higher speed,” he said.

The challenge is that the industry has been extremely secretive, to the point where people entering the fab aren’t allowed cell phones with cameras.

Ward said the industry will need to change how it thinks about IP. There needs to be a new data structure that allows it to be shared in some way, with “broad brush” IP treated differently than what’s really important.

“Industry 4.0 is about marginal gains,” Ward said. “It’s not about ‘give me all your data.’”

What we really need is a map that includes process data, design data and financial data, Ward said.

He pointed to the open innovation models presently being explored by companies such as GE, GM and Ford as something the semiconductor industry should consider.

Update: The day after this was posted, Mentor Graphics introduced new tools for Industry 4.0, although targeted at the PCB industry (which is not as secretive as the semi industry).

Additional reading: Industry 4.0 — Opportunities and Challenges of the Industrial Internet

IoT Surveys Indicate Optimism, Confusion

Solid State Technology recently conducted a survey of our readers on how the Internet of Things (IoT) is driving the demand for semiconductor technology. A total of 303 people responded to the survey. A majority of the respondents were in management roles.

Survey questions focused on their expectations for growth in the Internet of Things (IoT), drivers, potential roadblocks, opportunities and impact on semiconductor technology, including manufacturing and packaging.

There is little agreement on how strongly the IoT device market will grow. About a quarter of the respondents said, by 2020, 30-50 billion devices would be connected to internet with unique urls. Almost as many were much more optimistic, saying more than 90 billion.

A sizable majority of the respondents (59.41%) believe new companies will emerge to benefit from the growth in IoT. Existing companies will also benefit, with MEMS companies benefitting the most.

A majority of the respondents said the existing supply chain and industry infrastructure was not equipped to handle the needs of the IoT or said they weren’t sure. Similarly, most said new manufacturing equipment and new materials will be needed for IoT device manufacturing.

My take on this is that while the market potential for companies involved in IoT devices is large, there is little agreement on exactly how large it might become.

I believe it’s also likely that new companies will emerge focused specifically on manufacturing IoT devices. Existing companies across the supply chain will also benefit.

Clearly, IoT devices will create new challenges, especially in the area of packaging. Form-factor, security and reliability are the most important characteristics of IoT devices.
Another recently completed survey on the IoT by McKinsey & Company and the Global Semiconductor Alliance (GSA) revealed some ambiguity about whether the IoT would be the top growth driver for the semiconductor industry or just one of several important forces.

The survey of executives from GSA member companies showed that they had mixed opinions about the IoT’s potential, with 48 percent stating that it would be one of the top three growth drivers for the semiconductor industry and 17 percent ranking it first.

IoT, Healthcare and 5G to Drive RF and Microwave

Imagine the world in 2020, only five years from now. If predictions hold true, more than 50 billion devices will be connected to the Internet (creating the Internet of Things), through smart homes, smart cities, smart factories, smart everything. Two recent Cisco studies show there’s $19 trillion in IoT value is at stake in the private ($14.4 trillion) and public ($4.6 trillion) sectors. The studies see, for example, $2.5 trillion in value from better use of assets, improving execution and capital efficiency, and reducing expenses and cost of goods sold. In 2020, cars could be driving themselves and people could be monitoring their health through a variety of smartwatches and other wearables. And, of course, smartphones will continue to proliferate.

5G could also become a reality as early as 2020 (some estimate it will be later, perhaps 2025). Carriers’ base stations can handle hundreds of simultaneous users now, but that’s not enough to accommodate the billions of new devices that will hook into the Internet of Things. Some estimate that equipment makers will need to increase base station connectivity capacity by a factor of 1,000.

RF and microwave electronics are also becoming more valuable. Consider RF chips in smartphones. Instead of 30-40 cents for RF chips in a 2G phone, chipmakers will see $2 to $3 in a lower-end 3G smartphone. It then rises to $4 to $6 for a mid-tier LTE smartphone and $10-plus for high-end global LTE smartphones. No estimate yet on 5G smartphones, but it’s sure to be more.

These trends are good news for everyone involved in technologies associated with RF, microwave, millimeter wave, and THz frequencies, many of whom will be attending “Microwave Week” in Phoenix, May 17-22.  Besides the flagship IEEE MTT-S International Microwave Symposium (IMS), Microwave Week also hosts the IEEE RFIC and ARFTG conferences.

Microwave Week 2015 will start with RFIC Symposium, and followed by IMS Symposium, Microwave Historical Exhibit and ARFTG Microwave Measurement Conference.

The RFIC Symposium kicks off Sunday evening with the awards ceremony followed by two plenary speakers: Dr. Peter H. Siegel from Jet Propulsion Laboratories will talk on “From THz Imaging to Millimeter-Wave Stimulation of Neurons: Is there a Killer Application for High Frequency RF in the Medical Community?” He’ll be followed by a talk by Dr. Hermann Eul of Intel titled “RF as the Differentiator.”

On Monday at the IMS Symposium, University of Illinois’ Swanlund Chair Professor John Rogers will deliver the plenary session address. This kicks off a week of more than 160 technical sessions that indicate industry growth at the intersection of RF and microwave technologies with health.

Dr. Rogers’ opening keynote, “Soft Assemblies of Radios, Sensors and Circuits for the Skin,” will focus on the experimental and theoretical approaches for using soft materials, ultrathin micro/nanostructures and controlled processes of mechanical buckling to achieve ultralow modulus systems of semiconductor devices. The resulting skin-like technology has the potential to provide clinical-quality health monitoring capabilities for use outside of traditional hospital settings and laboratory facilities.

“Rogers sets the precedent for bridging the gap between research and real-world application,” said Vijay Nair, IMS symposium general chair. “His expertise allows him to provide deep insight into how technological innovation can result in significant opportunities for the microwave industry and for society as a whole.”

Closing IMS2015 on Thursday, May 21 is Agilent Technologies’ Chief Technology Officer and Senior Vice President Dr. Darlene Solomon, who will present her vision for how breakthroughs in cellular biology will enable advances in biology-based engineering in her talk, “The Century of Biology is Great for Engineering.”

“Solomon’s holistic approach to the application of technology to address societal issues offers a unique perspective to illustrate the great opportunities ahead for RF and microwave engineers,” said Nair.

The focus of the ARFTG 85th Microwave Measurement Conference; Automatic RF Techniques Group (ARFTG) on May 22nd, will be “Measurements and Techniques for 5G Applications.”

IoT and The ConFab 2015

I’m delighted to announce the keynotes and other key speakers for The ConFab 2015, to be held May 19-22 at The Encore at The Wynn in Las Vegas.

Our first keynote, on Wednesday, will be Ali Sebt, President and CEO of Renesas America, who will provide his insight on monetizing the Internet of Things. He’ll discuss how intelligent and connected platforms will enable new value chains based on a platform play, or an associated ecosystem play.

Our second keynote, on Thursday, will be Paolo Gargini, Chairman of the ITRS. The newly “re-framed” ITRS roadmap process has been extended with studies of key requirements from a system-level perspective that includes heterogeneous integration, new revolutionary devices and new ways of physical and wireless connectivity. Paolo will describe what is known as the ITRS 2.0.

Also slated to speak is Subramani Kengeri, Vice President, Global Design Solutions at GLOBALFOUNDRIES, who will talk about how the design eco-system is a critical enabler for semiconductor growth. Subi says that the rapid evolution of applications in the consumer and mobile space coupled with the emergence of the IoT are driving innovations that push the limits of power, performance, cost, and time-to-volume. At the same time, next generation SoCs are demanding stronger design and technology co-optimization solutions—some of which are optimal in main-stream technologies—to support complex design integration functions.

Lode Lauwers, Vice President Business Development, at imec will continue the IoT theme, focusing on how it is driving technology trends on system scaling and semiconductor manufacturing effectiveness. Lode says to realize the promises of an augmented, connected sustainable world, promised by the IoT, the IC industry faces significant challenges both at a distributed level, with the development of ultralow power sensor and radio technologies, as well as in the cloud, with huge computational requirements to store and process data.

Jim Feldhan, president of Semico, will present the outlook for key components of the IoT market.  Wearables, electronic health care, smart home, cities and cars all promise to be high volume semiconductor markets. What will these markets look like? What are some the enabling technologies necessary to make IoT a reality? Come to The ConFab 2015 and find out! See for more info.

Reframing the Roadmap: ITRS 2.0

The International Technology Roadmap for Semiconductor (ITRS) is being reframed to focus more on end applications, such as smartphones and micro-servers. Labeled ITRS 2.0, the new roadmap is a departure from a strong focus maintaining the path defined by Moore’s Law. The original ITRS was published in 1992 at the National Technology Roadmap for Semiconductors; it became the ITRS in 1998.

In an IEEE paper published late last year titled “ITRS 2.0: Toward a Re-Framing of the Semiconductor Technology Roadmap,” the roadmappers explain why it’s time for a change. “As new requirements from applications such as data center, mobility, and context-aware computing emerge, the existing roadmapping methodology is unable to capture the entire evolution of the current semiconductor industry. Today, comprehending how key markets and applications drive the process, design and integration technology roadmap requires new system-level studies along with chip-level studies.”

The ITRS roadmapping committee has already been reorganized to focus on ITRS 2.0. There are now seven groups focused on what ITRS chairman Paolo Gargini calls the seven “building blocks.”

  • System Integration—studies and recommends system architectures to meet the needs of the industry. It prescribes ways of assembling heterogeneous building blocks into coherent systems.
  • Outside System Connectivity—refers to physical and wireless technologies that connect different parts of systems.
  • Heterogeneous Integration—refers to the integration of separately manufactured technologies that in the aggregate provide enhanced functionality.
  • Heterogeneous Components —describes devices that do not necessarily scale according to “Moore’s Law,” and provide additional functionalities, such as power generation and management, or sensing and actuating.
  • Beyond CMOS—describes devices, focused on new physical states, which provide functional scaling substantially beyond CMOS, such as spin-based devices, ferromagnetic logic, and atomic switch.
  • More Moore—refers to the continued shrinking of horizontal and vertical physical feature sizes to reduce cost and improve performance.
  • Factory Integration consists of tools and processes necessary to produce items at affordable cost in high volume.

Gargini, who will be delivering a keynote at address at The ConFab 2015, said he it was clear that the ITRS needed to change in 2010 when tablets were gaining much traction. “By 2012, I outlined to the ITRS groups that we were going to change. 2013 was a hybrid year where we were putting together the building blocks for the new environment. Then in 2014, that’s what we had done exclusively.”


A revised ITRS was not released at the end of 2014, as has historically been the case. Gargini said the groups have been preparing white papers which should be released early this year. We’ll be publishing summaries in Solid State Technology, so stay tuned.