Tag Archives: The ConFab

AI Focus of The ConFab

Artificial Intelligence will be a focus of The ConFab 2018, to be held May 20-23 at The Cosmopolitan of Las Vegas. We’ll hear from a variety of speakers on why A.I. is so important to the semiconductor industry, not only in terms of the new types of chips that will be required, but how A.I. will bring dramatic improvements to the semiconductor manufacturing process.

“The exciting results of AI have been fueled by the exponential growth in data, the widespread availability of increased compute power, and advances in algorithms,” notes Rama Divakaruni of IBM, our keynote speaker. “Continued progress in AI – now in its infancy – will require major innovation across the computing stack, dramatically affecting logic, memory, storage, and communication.”

Rama will explain how the influence of AI is already apparent at the system-level by trends such as heterogeneous processing with GPUs and accelerators, and memories with very high bandwidth connectivity to the processor. The next stages will involve elements which exploit characteristics that benefit AI workloads, such as reduced precision and in-memory computation. Further in time, analog devices that can combine memory and computation, and thus minimize the latency and energy expenditure of data movement, offer the promise of orders of magnitude power-performance improvements for AI workloads.

John Hu, Director of Advanced Technology, Nvidia Corporation will also address AI in a talk titled “The Era of Deep Learning IC Industry Driven by AI, Autonomous Driving and Virtual Reality.” Hu notes that the “big bang” of AI and autonomous driving has driven the IC industry into a new era of rapid growth and innovation. In his talk, Hu will describe how the next 1000 times of improvement requires a new paradigm shift in the collaboration and co-optimizations across the whole industry; from materials, process technologies, design and chip/system platform. In this era that machine(s) can improve themselves by deep learning, hear how the semiconductor industry also needs to have the capability of deep learning for innovation, to stay ahead in the changing competitive landscape.

“Artificial intelligence has brought human beings to a point in history, for our industry and the world in general, that is more revolutionary than a small, evolutionary step,” says Howard Witham, Vice President of Texas Operations at Qorvo, who will speak on the potential of AI in the semiconductor fab.  Howard will describe how AI provides predictive maintenance, auto defect and wafer map classification, outlier detection, automated recipe setups based on device requirements and upstream data, and dynamic interpolation and guard-banding.

Please join us for these and other insightful talks, including one from Google’s John Martinis on quantum computing. Visit www.theconfab.com for more information.

Join Us at The ConFab 2018

The ConFab 2018, to be held May 20-23 at The Cosmopolitan of Las Vegas, is a conference and networking event designed to inform and connect leading semiconductor executives from all parts of the supply chain. Now in its 14th year, it is produced by Solid State Technology magazine, the semiconductor industry’s oldest and most respected business publication.

The goal of The ConFab this year is to show how today’s semiconductor manufacturers and their suppliers can they best position themselves to take advantage of the tremendous growth the industry is expecting to see in the near future, propelled by a wide array of new applications, including artificial intelligence, virtual and augmented reality, automotive, 5G, the IoT, cloud computing and healthcare.

Here’s a quick look at the agenda as it stands now.

After a welcome reception on Sunday evening, we’ll kick things off on Monday with a talk by IBM’s Rama Divakaruni on “How A.I. is Driving the New Semiconductor Era.” Although A.I. (and associated deep learning and machine learning) is now in its infancy, it will likely to have a major impact on how semiconductors will be designed and manufactured in the future. A.I. will demand dramatic enhancement in computational performance and efficiency, which in turn will drive fundamental changes in algorithms, systems and chip design.  Devices and materials will also change.

Following Rama’s talk, we’ll hear from John M. Martinis, Google who heads up Google’s Quantum A.I. Lab. The lab is particularly interested in applying quantum computing to artificial intelligence and machine learning.

After the keynote talks, we’ll hear from a number of industry visionaries, including John Hu, Director of Advanced Technology for Nvidia, Dan Armbrust, Founder and Director of Silicon Catalyst, and Tom Sonderman, President of Sky Water Technology Foundry. On Monday afternoon, invited industry experts, such as Bill Von Novak of Qualcomm will drill down into the applications most critical to semiconductor industry growth, including automotive, networking, healthcare and the IoT.

On Tuesday, the talks will focus on manufacturing trends and challenges with mainstream semiconductor manufacturing the focus of the morning session and advanced packaging the focus in the afternoon. George Gomba, VP of technology research at GlobalFoundries, will provide an update on EUV lithography, followed by Koukou Suu, of Ulvac, a leading expert on materials for phase change memories. Howard Witham, Vice President of Texas Operations, Qorvo, will provide some insights in using artificial intelligence and automation in semiconductor manufacturing.

The advanced packaging session on Tuesday afternoon is organized and sponsored by IEEE CPMT, notably Li Li, Distinguished Engineer, Cisco and William Chen, Fellow, ASE. The semiconductor industry is increased relying on advanced packaging to deliver far more integrated, complex and advanced solutions for different market segments.

On Wednesday, we’ll hear from leading analysts, including Len Jelinek, Senior Director, Semiconductor Manufacturing at IHS Markit, and Jim Feldhan, President of Semico, on market trends and the expected business climate moving forward.

You can register and keep up-to-date by visiting www.theconfab.com. For sponsorship inquiries, contact Kerry Hoffman at khoffman@extensionmedia.com.  For those interested in attending as a guest or qualifying as a VIP, contact Sally Bixby at sbixby@extensionmedia.com.

The ConFab 2018 Update

A new wave of growth is sweeping through the semiconductor industry, propelled by a vast array of new applications, including artificial intelligence, virtual and augmented reality, automotive, 5G, the IoT, cloud computing, healthcare and many others. The big question facing today’s semiconductor manufacturers and their suppliers is how can they best position themselves to take advantage of this tremendous growth.

Finding answers to that question is the goal of The ConFab 2018, to be held May 20-23 at The Cosmopolitan of Las Vegas. Now in its 14th year, The ConFab is a conference and networking event designed to inform and connect leading semiconductor executives from all parts of the supply chain. It is produced by Solid State Technology magazine, the semiconductor industry’s oldest and most respected business publication.

Kicking things off will be IBM’s Rama Divakaruni, who will speak on “How AI is Driving the New Semiconductor Era.” This is hugely important to how semiconductors will be designed and manufactured in the future, because AI — now in its infancy — will demand dramatic enhancement in computational performance and efficiency. Fundamental changes will be required in algorithms, systems and chip design.  Devices and materials will also need to change.

Rama is well position to address these changes: As an IBM Distinguished Engineer, he is responsible for IBM Advanced Process Technology Research (which includes EUV technologies and advanced unit process and Enablement technologies) as well as the main interface between IBM Semiconductor Research and IBM’s Systems Leadership. He is one of IBMs top inventors with over 225+ issued US patents.

We’re also pleased to announce several other speakers at this point. Joining us will be George Gomba, VP of technology research at GlobalFoundries. George has overall responsibility for GlobalFoundries’ semiconductor technology research programs, including global consortia and strategic supplier management (and, like Rama, has a long history at IBM). The focus of George’s talk will be on EUV lithography.

Dan Armbrust, Founder and Director of Silicon Catalyst, the world’s first incubator focused exclusively on semiconductor solutions startups will also be on the dais. A frequent speaker at The ConFab, Dan has a great background, including President and Chief Executive Officer of SEMATECH, IBM VP, 300mm Semiconductor Operations, and Strategic Client Exec for IBM’s Systems and Technology Group.

Another great speaker is Tom Sonderman, President of SkyWater Technology Foundry. Tom also has a great background including GlobalFoundries’ VP of manufacturing technology, and two decases at AMD, where he had global responsibility for development, integration, support and scalability of automation and manufacturing systems in the company’s wafer fabrication and assembly operations. Prior to joining SkyWater, Prior to joining SkyWater, Tom was the group vice president and general manager for Rudolph Technologies’ Integrated Solutions Group. In this position, he created a Smart Manufacturing ecosystem based on big data platforms, predictive analytics and IoT.

We’re so excited about the other speakers we tentatively have lined up, our plans for several thought-provoking panels and much more, so stay tuned. You register and keep up-to-date by visiting www.theconfab.com. For sponsorship inquiries, contact Kerry Hoffman at khoffman@extensionmedia.com.  For those interested in attending as a guest or qualifying as a VIP, contact Sally Bixby at sbixby@extensionmedia.com.

The ConFab 2018 will be held May 20-23

The ConFab 2018, to be held May 20-23 in Las Vegas, will take a close look at the new applications driving the semiconductor industry, the technology that will be required at the device and process level to meet new demands, and – perhaps most importantly – the kind of strategic collaboration that will be required. It is this combination of business, technology and social interactions that make The ConFab so unique and so valuable. Here are six key trends that will each have a huge impact in the near future:

  • The semiconductor industry is on the cusp of a new era of growth, driven by a diverse array of applications. Much of the growth will come from the need for better connectivity and more intelligent data analysis.
  • In the Internet of Things (IoT), data is captured by sensors and transferred via the appropriate networks, stored in data centers and analyzed. This creates demand for high performance computing, including artificial intelligence and “deep learning.” New computational methods are emerging, such as neuromorphic methods that mimic how the brain works.
  • Faster communication with higher bandwidth will be required. 5G wireless communication is coming, as is improved WiFi, near-field communication, Bluetooth and satellite communication.
  • Huge opportunities exist in automotive electronics, as autonomous driving moves closer to reality.
  • Virtual reality will be combined with artificial intelligence to create a truly immersive experience that mankind has never experienced.
  • Semiconductors will play an increasingly important role in the healthcare industry, as diagnostic tools and patient monitoring.

To meet the demands of these diverse applications, much innovation will be required on the technology side. Huge efforts are also needed to reduce the overall cost. Since the beginning, the economics of semiconductor manufacturing has been a focal point of The ConFab. In 2018, we will be including insights into the emerging and rapidly growing new markets and what semiconductor device manufacturers need to know to successfully tap into those markets.

New technology needed in manufacturing will be another focal point of The ConFab. EUV is finally entering volume production, ushering in a new era of patterning for the 7 and 5nm generations. Many new materials are being considered, transistors are evolving from FinFETs to gate-all-around nanowires, on chip communication with silicon photonics will soon emerge, and advanced packaging/heterogeneous integration is ever more critical.

There is a strong need for strategic collaboration across the entire supply chain. Empowering that collaboration is a high priority goal for The ConFab 2018. We do that through private, pre-arranged meetings among interested parties.  The ConFab also includes well-attended evening receptions plus breakfasts, lunches and refreshment breaks. These offer exceptional networking opportunities for people to meet in a relaxed environment.

In 2018, we expect heightened interest and involvement as we explore how businesses, people and technology must all work together to meet the world’s insatiable demand for new electronics.

The ConFab Preview

The agenda is set for The ConFab, to be held May 14-17, 2017 in San Diego at the iconic Hotel del Coronado. While reviewing the abstracts for just the Monday morning session, it struck me how well our speakers will cover the complex opportunities and challenges facing the semiconductor industry.

In the opening keynote, for example, Hans Stork, Senior Vice President and Chief Technical Officer, ON Semiconductor we will discuss the challenge to realize high signal to noise ratio in small (read inexpensive) and efficient form factors, using examples of image sensors and power conversion in automotive applications. “It seems that at last, after many decades of exponential progress in logic and memory technologies, the “real world” devices of power handling and sensor functions are jointly enabling another wave of electronics progress in autonomously operating and interacting Things,” he said.

Next, Subramani Kengeri, Vice President of CMOS Platforms Business Unit, GLOBALFOUNDRIES, will describe how the rapid growth of applications in the consumer, auto and mobile space coupled with the emergence of the Internet of Things (IoT) is driving the need for differentiated design and technology solutions. “While die-cost scaling is slowing down and power density is emerging as a major challenge, fabless semiconductor companies are hungry for innovation using application optimized technology solutions. Specifically, emerging SoC innovations are driving the need for low-power, performance, cost, and time-to-volume that solves the issues of voltage scaling and integration of “user-experience” functions,” he notes.

Islam Salama, a Director with Intel Corporation responsible for packaging substrate Pathfinding of the high-density interconnect across all Intel products, looks at it from a connectivity perspective. “The pervasive nature of computing drives a need for connecting billions of people and tens of billions of devices/things via cloud computing. Such connectivity effect will generate tremendous amounts of data and would require a revolutionary change in the technology infrastructures being used to transmit, store and analyze data,” he said.

Next-generation electronics will require several new packaging solutions, he adds. Smaller form factors, lower power consumption, flexible designs, increased memory performance, and-more than ever, a closely managed silicon package, co-optimization and architectural innovations. Heterogeneous integration through package with technologies such as system in package (SIP), on package integration (OPI) and fan-out (WLFO and PLFO) are poised to change the packaging industry and play a disruptive role in enabling next generation devices.

Heterogeneous Integration is also the focus of a talk by Bill Bottoms, Chairman and CEO, Third Millennium Test Solutions. Bill will report on the collaboration in the making of the HIR Roadmap to address disruptive changes in the global IT network, the explosive growth coming for IoT sensors and the multi-sensor fusion and data analytics that extract “awareness” from the expanding data.

I’m very much looking forward to these and many other talks this year, and the exciting panel discussions and networking events we have planned.

10 Reasons to Attend The ConFab this June

The ConFab Conference and Networking Event will be held June 12-15. Presented by Solid State Technology, this executive-level event is designed exclusively for those driving growth and innovation in the semiconductor industry. With a theme the “New Age of Innovation for Semiconductors,” it features deep insights on the challenges and opportunities facing the industry and also offers powerful networking opportunities. Here are my top 10 reasons to register now.

  1. The keynotes. Hear from Dr. Thomas Caulfield, senior vice president and general manager of the GlobalFoundries’ latest leading-edge 300mm semiconductor wafer manufacturing facility; Sunny Hui, senior vice president of worldwide marketing, Semiconductor Manufacturing International Corp., and Bill McClean, President of IC Insights.
  2. Dynamic networking. A big part of The ConFab is the networking. There are plenty of opportunities to get together at breakfast, lunch and for evening receptions. The semiconductor industry has undergone unprecedented consolidation over the last year and the only way to know who’s who in the new landscape it to get out and talk to people.
  3. Strategic business meetings. We arrange strategic meetings between technology suppliers and manufacturers, including IDMs, foundries and OSATs. Fabless companies, which are increasingly driving manufacturing decisions, are also involved.
  4. The big picture. You’ll walk away with a high level overview of the myriad of challenges and opportunities now facing the semiconductor industry. In our first session, speakers will include Dan Armbrust, CEO and co-founder, Silicon Catalyst; Lode Lauwers, VP, Business Development, imec; Kevin Gibb, Editor for the Research Division at TechInsights; Hughes Metras, VP Strategic Partnerships N.A., CEA Leti; and Mark Reynolds, Senior Director Industry Development, New York Empire State Development.
  5. Why new thinking is required for IoT innovation. The semiconductor industry needs to change the way it thinks about innovation, both technical innovation and business model innovation, especially when it comes to the Internet of Things (IoT). A panel session of experts and visionaries will discuss IoT’s role in various applications, how it will require investments in gateways, networks, servers and data analysis computers, and why IoT is the new big driver for semiconductor technology. Panelists include Uday Tennety, Director, Strategic Engagements and Innovation, GE Digital; Rajeev Rajan, Vice President of Product for Internet of Things, GlobalFoundries; Kelvin Low, Foundry Marketing, Samsung SSI; and Tim Hewitt, Director of Industry Solutions at Siemens. Come and ask questions!
  6. Fab Management. Today’s fab managers face a long list of everyday concerns and long term challenges. They must continually be thinking of ways to improve operational efficiency, optimize asset utilization, boost tool and worker productivity (and safety), increase throughput, maximize yield and reduce defectivity. A session will focus on this issues, with a focus on real, hands-on solutions. Speakers will include: Sanchali Bhattacharjee, Technology Strategist: Component Supply Chain, Intel; Ardy Sidwha, Sr. Director, Innovation & Technology (R&D) at QuantumClean; Rick Glasmann, Senior Director and Managing Director FE Operations Temecula; and Mike Czerniak, product marketing manager at Edwards.
  7. System Level Integration: New Directions in Packaging. System level package innovation and heterogeneous integration encompass a wide range of technologies, including module and 3D packaging, system-in-package (SiP), fanout, and embedded technologies. But questions remain. How will these technologies be utilized in advanced data centers & network systems, in future smart phones, and the growing medical, industrial and lifestyle IoT applications? A session, sponsored and organized by IEEE’s CPMT Society, will look at how packaging technologies are enabling innovative solutions that achieve system application requirements while maximizing system level performance, and, meeting cost, performance, form factor and reliability goals.
  8. China. With the “Made in China 2025” initiative, China is aiming to improve the self-sufficiency rate for ICs in the nation to 40% in 2020, and boost the rate further to 70% in 2025. What will be key is how Chinese companies can gain access to 16/14nm, 10nm, and 7nm technologies as well as DRAM and 3D NAND technologies. China is also planning to be global leader in 5G, with test development in 2018 and initial broadband deployment in 2020. This session will examine how the China “wild card” and increased M&A activity designed to bring advanced technology into China is a true game-changer for the worldwide semiconductor industry. Following SMIC’s Sunny Hui’s keynote, presenters will include Ed Pausa from PricewaterhouseCoopers and Jimmy Goodrich, Vice President, Global Policy, Semiconductor Industry Association. Bill McClean will also discuss China in his talk.
  9. Great location. The ConFab will take place at the beautiful Encore at The Wynn right in downtown Las Vegas.
  10. Collaboration. It’s clear that the need for real collaboration has never been greater. At The ConFab, industry leaders will gather to tackle tough questions, take a look at the new post-consolidation landscape, network in a unique environment and collaborate on the future.

Register now by contacting Sally Bixby at sbixby@extensionmedia.com. Complimentary passes are available to qualified VIPs. You can also check out The ConFab website. I hope to see you there!

IoT and The ConFab 2015

I’m delighted to announce the keynotes and other key speakers for The ConFab 2015, to be held May 19-22 at The Encore at The Wynn in Las Vegas.

Our first keynote, on Wednesday, will be Ali Sebt, President and CEO of Renesas America, who will provide his insight on monetizing the Internet of Things. He’ll discuss how intelligent and connected platforms will enable new value chains based on a platform play, or an associated ecosystem play.

Our second keynote, on Thursday, will be Paolo Gargini, Chairman of the ITRS. The newly “re-framed” ITRS roadmap process has been extended with studies of key requirements from a system-level perspective that includes heterogeneous integration, new revolutionary devices and new ways of physical and wireless connectivity. Paolo will describe what is known as the ITRS 2.0.

Also slated to speak is Subramani Kengeri, Vice President, Global Design Solutions at GLOBALFOUNDRIES, who will talk about how the design eco-system is a critical enabler for semiconductor growth. Subi says that the rapid evolution of applications in the consumer and mobile space coupled with the emergence of the IoT are driving innovations that push the limits of power, performance, cost, and time-to-volume. At the same time, next generation SoCs are demanding stronger design and technology co-optimization solutions—some of which are optimal in main-stream technologies—to support complex design integration functions.

Lode Lauwers, Vice President Business Development, at imec will continue the IoT theme, focusing on how it is driving technology trends on system scaling and semiconductor manufacturing effectiveness. Lode says to realize the promises of an augmented, connected sustainable world, promised by the IoT, the IC industry faces significant challenges both at a distributed level, with the development of ultralow power sensor and radio technologies, as well as in the cloud, with huge computational requirements to store and process data.

Jim Feldhan, president of Semico, will present the outlook for key components of the IoT market.  Wearables, electronic health care, smart home, cities and cars all promise to be high volume semiconductor markets. What will these markets look like? What are some the enabling technologies necessary to make IoT a reality? Come to The ConFab 2015 and find out! See www.theconfab.com for more info.

Can we take cost out of technology scaling?

There is much talk these days about continued scaling, including some recent posts by my colleague Ed Korczynski, in “Moore’s Law is Dead” Part 1 (What?) and Part 2 (When?). At The ConFab in June, keynote speaker, Dr. Gary Patton, vice president, semiconductor research and development center at IBM, talked about scaling, adding some historical perspective. I previously blogged about the “three fundamental shifts” that Patton believes will lead to a bright future for the semiconductor industry.

“We will keep scaling,” he said. “We have shown a tremendous ability to innovate and keep moving that technology forward.”

In the 1990s, Patton notes that life was actually pretty simple. “You brought in a new lithography tool, you scaled the horizontal dimensions, you scaled the vertical dimensions and you got a new technology out. It was better performance, the same power density, and you could do a lot more on the chip,” he said.

Patton_Slide5

Around 2000, we hit the gate oxide limit. “Gate oxide got to be abount three atomic layers. We could have said at that point ‘game over, scaling has ended.’ But guess what, we innovated. We came up with a pretty fundamental shift in ideas which is let’s change the fundamental properties of silicon. If we can strain the silicon, we can enhance the mobility. We can change the gate oxide. We can enhance the coupling between the gate and the channel. And that’s what we get over that last decade. We said let’s go from SRAM to a very high performance eDRAM (embedded DRAM) so we can put a lot more memory next to the processor because we knew memory was a key gating factor for the processor speed. This enabled the personal computing era and smart consumer electronics,” Patton said.

In 2010, we were at another one of these inflection points. “It’s not surprising that the improvements in 20nm are less than people would like because we really reached the end of the planar device era. Again, we were saying ‘game over, we’re done scaling.’ But no, we continue to innovate. The next decade is really about 3D. 3D devices, finFETs, or 3D chip integration,” he added.

Patton said that design technology co-optimization will be a key piece of getting through the next decade. “That will probably take us to about 2020,” he said. At that point we’re going to “hit the atomic dimension limit and we’re going to have to do it all over again. Here, we’re going to get into nanotechnology. Nanowire devices, silicon nanowires, carbon nanotubes, photonics and multi-chip stacking to bring things together. That will enable wearable computing, everywhere connectivity and cognitive computing.”

Patton said the problem is not physics. “We’re going to have solved the physics problems,” he said. “The problem is financial.” Patton showed a chart (below) that depicted the history of our industry from 1980 to present. “What drove the industry was smaller features, which enabled better performance and better cost per function. It enabled new types of applications, and that enabled larger markets. If you look in this time period, there’s about a six order of magnitude improvement in cost per transistor and that enabled a seven order of magnitude increase in consumption of silicon transistors,” he said.

Patton_Slide6

The challenge we’re facing right now is depicted below, showing the compound growth rate reduction and the cost of a circuit. On the x-axis is linear scaling. “We’ve typically targeted about a 0.7X linear scaling, which means from an area perspective, you get about 50% improvement. Note the line, 50%, doesn’t go through 50% improvement because with each new technology, there is some increase in complexity. It might be more like 30% improvement at the die level. If we’re really good and provide some enhancements in the technology, self-aligned processes, things like that, we may get it to 40%. So 30-40% is about the range we’ve been getting in terms of the cost per die improvement as we scale up.

Patton_Slide7

“The challenge we’re facing now is two fold. Number one, we’re struggling to get that 0.7X linear scaling. It might be about 0.8X. And we’re adding a lot more complexity, especially when you adding double and triple patterning .The focus today in innovation has got to be heavily focused on ‘how do we drive cost?’ Not just how do you scale, because scaling would add a lot of extra cost at this point. How do we drive cost down, how do we keep adding value to the technology. The model is changing. Moore’s Law can still hold, but we have to focus on the cost equation. So there’s really two parts. Technology innovation which is focusing on the patterning, focusing on the materials, the processing, and how do we drive that to take cost out of the technology scaling,” Patton said.

Three fundamental shifts

At The ConFab last week, Dr. Gary Patton, vice president, semiconductor research and development center at IBM, said there is a bright future in microelectronics (I heartily agree). He said that although there seems to be a fair amount of doom and gloom that scaling is ending and Moore’s Law is over, he is very positive. “There are three huge fundamental shifts that are going to drive our industry forward, will drive revenue growth and will force us to keep innovating to enable new opportunities,” he said.

The first fundamental shift is the explosion of applications in the consumer and mobile space. Patton noted examples such as cars that can drive themselves and can detect people and bicyclists and avoid them, smart phones for as little as $25, wearable devices that not only tell you what you’re doing but how you’re doing, and 4K television. “That is an incredible TV system, but it’s going to demand a lot of bandwidth; twice the bandwidth that’s out there today. If you turn on your 4K system, your neighbors are going to start to notice it when they try to access the internet,” he said.

Patton said that it’s estimated that today there are about 12.5 billion devices connected to the internet. That’s expected to grow to $30 billion by 2020. This represents the second fundamental shift commonly known as Big Data. “All these interconnected devices are shoving tremendous amount of data up into the cloud at the rate of 1.5 Exabytes (1018) bytes of data per month,” Patton said. “And that’s grown by about an order of magnitude in just the last 13 years. The estimate is that in the next 4 years, it’s going to go up another order of magnitude. It’s accelerating.”

The third fundamental shift is with all this data going up into the cloud, the data is almost all unstructured data, such as video and audio. “It’s related data but disconnected. How do we take that data and do something with it? That brings us to analytics and cognitive computing. We have really just started in this arena.”

So there you have it. Three reasons to be very positive about the future of the semiconductor industry: an explosion of applications, the rise of big data and the need to analyze all that data.

GLOBALFOUNDRIES’ Kengeri to speak at The ConFab

Subramani Kengeri, Vice President, Advanced Technology Architecture at GLOBALFOUNDRIES will speak at The ConFab 2014 on the “techno-economics” of how the relatively small semiconductor industry ($350 billion or $0.35 trillion) is driving the $85 trillion gross world product (GWP). He notes that semiconductors are only a fraction of GWP, but a critical enabler of global economic growth and productivity. Cost effective technology innovations have kept Moore’s law alive, although techno-economic challenges are mounting on each successive node. The cost of building a new advanced fab has reached $6B. Process development and chip design costs are going up astronomically, while next generation SoCs in the IoT era are pushing cost-per-function to unprecedented levels, he says. His talk will review advanced design and silicon technology challenges posing threats to cost effective scaling, potentially impacting global GWP and productivity. 

Subramani (“Subi”) is responsible for defining competitive process architecture on advanced nodes in support of “first time right” technology development. He is responsible for determining the technology feasibility, competitiveness and manufacturability of all elements of technology platform and to establish the advanced technology roadmap for GLOBALFOUNDRIES.

Subramani joined GLOBALFOUNDRIES in 2009 as the Vice President of Design Solutions. He implemented strategic Design enablement initiatives and established a strong foundation for collaboration with Design eco-system, before moving to focus on R&D. He started his Semiconductor career at Texas Instruments and prior to joining GLOBALFOUNDRIES, he was the Senior Director of Design and Technology Platform at TSMC.