Thu, 4 Apr 2014
September 2015 (Date and time TBD)Continued scaling and more complex device structures, including FinFETs and 3D stacking, are creating new challenges in metrology and inspection. Smaller defects must be detected and analyzed on an increasingly diverse set of materials. Chip makers are looking for better wafer edge inspection techniques, higher resolution metrology tools, 450mm-capability and new compositional analysis solutions. Experts will describe new approaches for next generation metrology and inspection, including measurements of CDs, stress, film thickness and non-visual defects.
Thu, 4 Apr 2014
September 2015 (Date and time TBD)EUV lithography has been under intense development for years and appears to be close to production. Yet its delay has the industry searching for alternatives, including double, triple and even quadruple patterning, directed self-assembly, multi-e-beam and nanoimprint. In this webcast, experts will detail various options, future scenarios and challenges that must still be overcome.
Tue, 3 Mar 2014
November 2015 (Date and time TBD)
As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D SRAMs, high mobility transistors and 450mm wafer processing.
Wed, 4 Apr 2014
October 2015 (Date and time TBD)
Printed electronics are at a pivotal moment. There are not only tremendous opportunities for innovation and growth in new verticals and industries, but a new way of thinking about how electronics are made, combining techniques and materials used by printed electronics with those of 3D printing. Presenters will review printed electronics and discuss future directions, from smart labels and wearables, to trends and technologies that enable the printing of IoT devices with embedded sensors, transistors, displays, batteries and memory.
Tue, 2 Feb 2014
December 2015 (Date and time TBD)
Conventional planar flash memory technology is approaching critical scaling limitations that are driving the transition to 3D solutions. 3D NAND is expected to scale in height, from 16-bit-tall strings to string heights of more than 128 bits. Meanwhile NAND makers will find ways of placing these strings closer to each other through more aggressive lithography. Imec’s Jan Van Houdt, director flash memory program / manager memory device design group, will discuss trends, challenges and opportunities.