Touch Technologies

TOUCH TECHNOLOGIES ARTICLES



Printing in the hobby room: Paper-thin and touch-sensitive displays on various materials

10/13/2014  What if you could integrate paper-thin displays into the cards, which could be printed at home and which would be able to depict self-created symbols or even react to touch? Those only some of the options computer scientists in Saarbrücken can offer.

SPIE Photomask Technology Wrap-up

09/23/2014  Extreme-ultraviolet lithography was a leading topic at the SPIE Photomask Technology conference and exhibition, held September 16-17-18 in Monterey, Calif., yet it wasn’t the only topic discussed and examined. Mask patterning, materials and process, metrology, and simulation, optical proximity correction (OPC), and mask data preparation were extensively covered in conference sessions and poster presentations.

SPIE panel tackles mask complexity issues

09/19/2014  Photomasks that take two-and-a-half days to write. Mask data preparation that enters into Big Data territory. And what happens when extreme-ultraviolet lithography really, truly arrives?

ASML on EUV: Available at 10nm

09/17/2014  Extreme-ultraviolet lithography systems will be available to pattern critical layers of semiconductors at the 10-nanometer process node, and EUV will completely take over from 193nm immersion lithography equipment at 7nm, according to Martin van den Brink, president and chief technology officer of ASML Holding.

Design and Manufacturing Technology Development in Future IC Foundries

09/16/2014  Virtual Roundtable provides perspective on the need for greater integration within the “fabless-foundry” ecosystem.

Monolithic 3D breakthrough at IEEE S3S 2014

09/15/2014  In the upcoming 2014 IEEE S3S conference (October 6-9), MonolithIC 3D will unveil a breakthrough flow that is game-changing for 3D IC. For the first time ever monolithic 3D (“M3DI”) could be built using the existing fab and the existing transistor flow.

Process Watch: Sampling matters

09/15/2014  Determining an optimum sampling strategy comes down to weighing the cost of process control against the benefit of capturing the defect or other excursion in a timely manner.

Foundry, EDA partnership eases move to advanced process nodes

09/15/2014  A leading semiconductor foundry and an EDA vendor with design-for-yield (DFY) solutions have enjoyed a long-term partnership. Recently, they worked together to leverage DFY technologies for process technology development and design flow enhancement.

Research Alert: September 9, 2014

09/09/2014  GLOBALFOUNDRIES and SRC announce new scholarship for undergraduate engineering students; Layered graphene sandwich for next generation electronics; Doped graphene nanoribbons with potential

The Week in Review: September 5, 2014

09/05/2014  New non-volatile memory technology; President and CEO of FSA announced; Samsung to use ProPlus 14nm finFET SPICE modeling platform; MEMS gyroscope from Analog Devices; SEMICON Taiwan held this week

Research Alert: September 3, 2014

09/03/2014  A new, tunable device for spintronics; Copper shines as flexible conductor; Competition for graphene

Intel Announces “New Interconnect” for 14nm

09/02/2014  Intel has just announced that “Embedded Multi-die Interconnect Bridge (EMIB”) packaging technology will be available to 14nm foundry customers.

The Week in Review: August 29, 2014

08/29/2014  Intel releases new packaging technologies; Fairchild Semiconductor to close two facilities; KLA-Tencor introduces new metrology tools; UMC joins Fujitsu's new foundry company; Thinnest-possible semiconductor; SEMI announces keynotes for Vietnam Semiconductor Strategy Summit

Lithography: What are the alternatives to EUV?

08/28/2014  Hopes remain high for EUV, but long delays has caused attention to shift to various alternatives.

The Week in Review: August 22, 2014

08/22/2014  Collaboration for next-generation smart glasses; Book-to-bill ratio holds steady in July; Intel and Unity to collaborate; MediaTek launches new R&D facility; Amkor appoints new member to board of directors; STATS ChipPAC achieves shipping milestone

The Week in Review: August 15, 2014

08/15/2014  The growing semiconductor market in India; MEMSIC's monolithic, wafer-level packaged accelerometer; Si2 adds new director of 3DIC Programs; Worldwide silicon wafer area shipments increased during the second quarter 2014; LightFair announces Call for Speakers

Atomic Layer Etch now in Fab Evaluations

08/04/2014  Lam’s CTO talks about the future of etch in beta-site tests.

Capacitive touch controller IC market to grow at double-digit CAGR until 2017

07/16/2014  The capacitive touch controller IC market is predicted to reach about $2.8 billion in 2017, an increase of nearly 50 percent from $1.9 billion in 2013, according to a new report from IHS Technology.

Renasas Electronics announces development of new capacitive-touch sensing technology

07/16/2014  Renesas Electronics America Inc., a supplier of advanced semiconductor solutions, today announced development of innovative new intellectual property (IP) that implements capacitive-touch sensing technology ideal for home appliances and healthcare equipment.

Sustainability through Materials Recovery

07/16/2014  Recovering and reusing materials is becoming an increasingly essential consideration in order to ensure consistent quality, a stable supply of materials, and lower costs. On- and off-site options are reviewed for helium, argon, sulfuric acid and Xenon.




TWITTER


WEBCASTS



Advanced Packaging: A Changing Landscape Rife with Opportunities

May 10, 2016 at 1 PM ET / Sponsored by Brewer Science

Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. Through-silicon vias are moving into volume packaging production, but problems with reliability, cost, and scaling remain. The supply chain also must adjust to this “mid” step between front- and back-end chip production. This webcast will explore the wafer thinning, bonding, TSV formation and other critical process steps necessary to enable 3D integration.

Sponsored By:
Trends in MEMS

May 11, 2016 at 12 PM ET / Sponsored by Boston Semi Equipment

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

Sponsored By:
Fan-Out Wafer Level Packaging

May 2016 (Date and time TBD) / Sponsored by Zeta Instruments

Wafer level packaging (WLP) using fan-out technology is an attractive platform for achieving low-cost low-profile package solutions for smart-phones and tablets, which require cost-effective, high-density interconnects in small form-factor packaging. Assembled directly on a silicon wafer, the approach is unconstrained by die size, providing the design flexibility to accommodate an unlimited number of interconnects between the package and the application board for maximum connection density, finer line/spacing, improved electrical and thermal performance and small package dimensions to meet the relentless form factor requirements and performance demands of the mobile market. In this webcast, industry experts will explain the FOWLP process, discuss recent advances and forecast future trends.

Sponsored By:
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TECHNOLOGY PAPERS



Protecting Electronics with Parylene

This whitepaper provides a comprehensive overview of parylene conformal coating, advantages of parylene, and applications for parylene to protect electronic devices. As technology continues to advance, devices will encounter rugged environments and it is vital that they are properly protected. Parylene conformal coating is one way that manufacturers are giving their devices a higher level of protection, along with increasing the overall quality of their products. Parylene conformal coating applications for Electronics include: · I/O & PCI Modules · Power Converters and Supplies · Backplanes · Other Embedded Computing applications · Other specialty electronics and assemblies April 26, 2016
Sponsored by Diamond-MT

NMT: A Novel Technology for In-Line Ultra-Thin Film Measurements

XwinSys identified the semiconductors recent market trends and developed a novel XRF technology, named NMT: Noise-reduced Multilayer Thin-film measurement. This innovative approach can be used for in-line inspection and metrology features, to accurately and precisely analyze single and multi-layered elements in ultra-thin films. NMT novel technology can be utilized for in-line applications ranging from localized ultra-thin film stacks to the inspection of 3D localized features to the analysis of defects involving geometries, voids and material elements. February 23, 2016
Sponsored by XwinSys Technology Development Ltd.

Adhesives for Electronic Applications

Master Bond custom formulates epoxy adhesives, sealants, coatings, potting and encapsulation compounds to meet the rigorous needs of the electronic industry. We are a leading manufacturer of conformal coatings, glob tops, flip chip underfills, and die attach for printed circuit boards, semiconductors, microelectronics, and more. Browse our catalog to find out more.January 05, 2016
Sponsored by Master Bond, Inc.,

More Technology Papers

EVENTS



SID Display Week 2016
San Francisco, CA
http://www.displayweek.org
May 22, 2016 - May 27, 2016
Design Automation Conference
Austin, TX
https://dac.com
June 05, 2016 - June 09, 2016
The ConFab
Las Vegas, NV
http://theconfab.com
June 12, 2016 - July 15, 2016
SEMICON West 2016
San Francisco, CA
http://www.semiconwest.org
July 12, 2016 - July 14, 2016

VIDEOS