Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



STATS ChipPAC’s fcCuBE technology surpasses 100 million unit milestone

08/20/2014  STATS ChipPAC Ltd., a provider of advanced semiconductor packaging and test services, announced today that it has shipped over 100 million semiconductor packages with the company’s fcCuBE technology, advanced flip chip packaging with fine pitch copper (Cu) column bumps, Bond-on-Lead (BOL) interconnection and enhanced assembly processes.

MEMSIC introduces the world's first monolithic and wafer level packaged 3D-axis accelerometer

08/15/2014  MEMSIC, Inc., a MEMS sensing solution provider, announced today the availability of its MXC400xXC, the world's first monolithic 3D accelerometer, and also the first 3D accelerometer to utilize WLP technology.

Pfeiffer Vacuum joins the Facilities 450mm Consortium

08/06/2014  The Facilities 450mm Consortium (F450C), a partnership of leading nanoelectronics facility companies guiding the effort to design and build the next-generation 450mm computer chip fabrication facilities, today announced it has again increased in size, naming Pfeiffer Vacuum as the twelfth member company to join the consortium.

Fusion bonding for next-generation 3D-ICs

07/24/2014  Recent developments in wafer bonding technology have demonstrated the ability to achieve improved bond alignment accuracy.

Jordan Valley Semiconductors wins more market share in advanced wafer level packaging

07/03/2014  Jordan Valley Semiconductors Ltd., a supplier of X-ray based metrology tools for advanced semiconductor manufacturing lines, today announced that its micro-spot X-ray Fluorescence (µXRF) metrology tool has been qualified for production monitoring of advanced Wafer Level Packaging (WLP) processes, by another memory player.

ConFab panelists discuss optimizing R&D in the changing semi landscape

06/24/2014  Overheard @The ConFab: “I feel the best I’ve felt about semi since 2009.” –Mike Noonen, Silicon Catalyst

Noise cancellation: The new failure and yield analysis superpower

06/22/2014  Root cause deconvolution is a quick and cost effective way to determine the underlying root causes represented in a population of failing devices from test data alone.

Applied Materials enables cost-effective vertical integration of 3D chips

05/28/2014  Applied Materials, Inc. today introduced the Endura Ventura PVD system that helps customers reduce the cost of fabricating smaller, lower power, high-performance integrated 3D chips.

STATS ChipPAC introduces robust encapsulated wafer level packaging technology

05/28/2014  STATS ChipPAC Ltd., a provider of advanced semiconductor packaging and test services, today introduced encapsulated Wafer Level Chip Scale Package, a packaging technology that raises the industry standard of durability for Wafer Level Chip Scale Packaging (WLCSP).

Ziptronix and EV Group demonstrate submicron accuracies for wafer-to-wafer hybrid bonding

05/27/2014  ­ Ziptronix Inc. and EV Group today announced they have successfully achieved submicron post-bond alignment accuracy on customer-provided 300mm DRAM wafers.

MediaTek, SK Hynix, AMD, and Micron sales surge in first quarter

05/19/2014  Top 20 ranking shows that semiconductor industry company consolidation continues to accelerate.

Deca Technologies ships 100-millionth wafer-level packaged component

04/16/2014  Deca Technologies, an electronic interconnect solutions provider to the semiconductor industry, today announced that it has shipped its 100-millionth component.

Global Semiconductor Alliance celebrates 20 years of industry collaboration

04/08/2014  The Global Semiconductor Alliance (GSA) is celebrating 20 years of industry collaboration this year.

Imec achieves record 8.4 percent conversion efficiency in fullerene-free organic solar cell

03/12/2014  In this week’s Nature Communications, imec presents the development of fullerene-free organic photovoltaic (OPV) multilayer stacks achieving a record conversion efficiency of 8.4 percent.

STATS ChipPAC introduces breakthrough manufacturing method for wafer level packaging

03/12/2014  STATS ChipPAC, a provider of advanced semiconductor packaging and test services, has designed and implemented an innovative new manufacturing method that is a significant paradigm shift from conventional wafer level manufacturing.

GlobalFoundries and Fraunhofer IIS to collaborate on EUROPRACTICE, Europe's MPW wafer shuttle program

02/26/2014  GLOBALFOUNDRIES and Fraunhofer Institute for Integrated Circuits IIS today announced the extension of their long-term collaboration, focusing on 40nm and 28nm processes. GLOBALFOUNDRIES will also join the European Multi Product Wafer (MPW) Program EUROPRACTICE.

International Rectifier opens ultra-thin wafer processing facility in Singapore

02/24/2014  International Rectifier, IR, today announced that the company has commenced initial production at its new ultra-thin wafer processing facility in Singapore (IRSG).

North American semiconductor equipment industry posts January 2014 book-to-bill ratio of 1.04

02/21/2014  A book-to-bill of 1.04 means that $104 worth of orders were received for every $100 of product billed for the month.

SMIC and JCET establish joint venture for 12 inch bumping and testing

02/21/2014  Semiconductor Manufacturing International Corporation, China's largest and most advanced semiconductor foundry, and Jiangsu Changjiang Electronics Technology Co., Ltd., the largest packaging service provider in China, jointly announced today a joint venture for 12" bumping and related testing.

Epoxy Technology and John P. Kummer Group announce a new specialty adhesive packaging company

02/20/2014  Epoxy Technology, Inc. and John P. Kummer Group announce the formation of a new specialty adhesive packaging company, Epoxy Technology Europe Ltd (ETEL).




FINANCIALS



TECHNOLOGY PAPERS



Parylene 101: Learn about the best protection for MEMS

This paper explains the basic history, processes, and applications of the ultimate conformal coating, parylene. Parylene has historically been used to protect printed circuit boards, LEDS, and medical devices from rugged environments and the human body, but now the pin-hole free coating is being used increasingly by the leaders in the MEMS market. With no known chemical that can harm the film, it is a perfect application for fuel tanks, water meters, or any product that must function in a hazardous environment. May 22, 2014
Sponsored by Diamond-MT

Conformal Coatings for Reliable Electronic Assemblies

Modern electronics have become part of our daily lives and the sophisticated electronic circuitry at the heart of these devices and systems must be reliable. Conformal coatings act as a barrier between the electronics and the environment, protecting the areas they cover while strengthening delicate components and traces. Find out more about how conformal coatings enhance the reliability and longevity of electronic printed circuit boards.April 24, 2014
Sponsored by Master Bond, Inc.,

The Next Step in Diagnosis Resolution Improvement

Learn more about RCD as the next step in diagnosis solution enhancement. Where layout-aware diagnosis points to a segment, earn more about RCD as the next step in diagnosis solution enhancement. Where layout-aware diagnosis points to a segment, RCD can isolate a particular root cause in that segment. RCD, a statistical enhancement technology in Tessent Diagnosis and YieldInsight products, is the next step in diagnosis resolution enhancement. It works by analyzing multiple layout diagnosis reports together to identify the underlying defect distribution that is more likely to explain this set of diagnosis results. RCD does not require any additional data beyond what is required for layout-aware diagnosis. This means that RCD fits well into existing diagnosis flows. April 24, 2014
Sponsored by Mentor Graphics

More Technology Papers

WEBCASTS



Metrology

August 2014 (date and time TBD)

Continued scaling and more complex device structures, including FinFETs and 3D stacking, are creating new challenges in metrology and inspection. Smaller defects must be detected and analyzed on an increasingly diverse set of materials. Chip makers are looking for better wafer edge inspection techniques, higher resolution metrology tools, 450mm-capability and new compositional analysis solutions.

Sponsored By:
Advanced Packaging

Sept. 2014 (Date and time TBD)

Back-end packaging is increasingly important to semiconductor device form factor, thermal and power performance, and costs. Compounded by the demand for lead-free processing and the soaring cost of gold, the industry is developing new approaches to packaging, including redistribution layers (RDL), through silicon vias (TSV), copper pillars, wafer-level packaging (WLP) and copper wire bonding. Experts will discuss these and other approaches in this webcast.

Sponsored By:

Interconnects

Oct. 2014 (Date and time TBD)

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

Sponsored By:

More Webcasts

VIDEOS



EVENTS



SEMICON Taiwan 2014
Taiwan
http://www.semicontaiwan.org/en/
September 03, 2014 - September 05, 2014
Vietnam Semiconductor Strategy Summit
Ho Chi Minh City, Vietnam
http://www.semi.org/en/node/46001
September 16, 2014 - September 17, 2014
APC (Advanced Process Control) Conference XXVI 2014
Ann Arbor, Michigan
http://www.apcconference.com/
September 29, 2014 - October 01, 2014