Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



SEMI April 2015 book-to-bill report shows continued improvements in bookings and billings

05/21/2015  A book-to-bill of 1.04 means that $104 worth of orders were received for every $100 of product billed for the month.

Six top 20 semiconductor suppliers show >20% growth

05/21/2015  SK Hynix moves into top 5, MediaTek climbs into top 10, and Sharp and UMC move into the top 20 ranking.

imec and Tokyo Electron demonstrate electrical advantages of direct Cu etch scheme for advanced interconnects

05/20/2015  Today, at the IEEE IITC conference, nano-electronics research center imec and Tokyo Electron Limited (TEL) presented a direct Cu etch scheme for patterning Cu interconnects.

Computing at the speed of light

05/19/2015  University of Utah engineers have taken a step forward in creating the next generation of computers and mobile devices capable of speeds millions of times faster than current machines.

imec and Lam Research develop novel metallization method

05/19/2015  During the IEEE IITC conference in Grenoble, the nanoelectronics research center imec and Lam Research Corporation today presented a novel bottom-up prefill technique for vias and contacts.

First quarter silicon wafer shipments reach record levels

05/19/2015  Worldwide silicon wafer area shipments increased during the first quarter 2015 when compared to fourth quarter 2014 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Process Watch: Time is the enemy of profitability

05/14/2015  There are three main phases to semiconductor manufacturing: research and development (R&D), ramp, and high volume manufacturing (HVM). All of them are expensive and time is a critical element in all three phases.

SRC names former Freescale CTO Ken Hansen as new president and CEO

05/14/2015  Semiconductor Research Corporation (SRC) announced today that Ken Hansen has been appointed SRC’s new President and Chief Executive Officer (CEO), effective June 1.

IBM's silicon photonics technology ready to speed up cloud and Big Data applications

05/12/2015  IBM today announced a significant milestone in the development of silicon photonics technology, which enables silicon chips to use pulses of light instead of electrical signals over wires to move data at rapid speeds and longer distances in future computing systems.

ITRS 2.0: Heterogeneous integration

05/06/2015  Interconnecting transistors and other components in the IC, in the package, on the printed circuit board and at the system and global network level, are where the future limitations in performance, power, latency and cost reside.

Entegris elects James P. Lederer to Board of Directors

05/01/2015  Entegris, Inc., a provider of yield-enhancing materials and solutions for advanced manufacturing processes, announced the election of James P. Lederer as an independent director at the Company's Annual Meeting of Shareholders held today.

Applied Materials and Tokyo Electron terminate merger

04/27/2015  The decision came after the U.S. Department of Justice (DoJ) advised the parties that the coordinated remedy proposal submitted to all regulators would not be sufficient to replace the competition lost from the merger

North American semiconductor equipment industry posts March 2015 book-to-bill ratio of 1.10

04/22/2015  A book-to-bill of 1.10 means that $110 worth of orders were received for every $100 of product billed for the month.

Top 10 2015 semiconductor sales leaders forecast to include NXP/Freescale

04/17/2015  Total top 10 marketshare of semiconductor industry now back over 50 percent.

KLA-Tencor introduces new portfolio for advanced semiconductor packaging

04/16/2015  Today, KLA-Tencor Corporation announced two new systems that support advanced semiconductor packaging technologies: CIRCL-AP and ICOS T830.

A*STAR's IME and partners to enable low cost packaging technology for system scaling within smart devices

04/15/2015  A*STAR’s Institute of Microelectronics (IME), together with industry partners, have formed a High-Density Fan-Out Wafer Level Packaging (FOWLP) consortium to extend FOWLP capabilities for applications in devices such as smart phones, tablets, navigation tools and gaming consoles.

ClassOne enters ECD lab partnership with Shanghai Sinyang

04/14/2015  Semiconductor equipment manufacturer ClassOne Technology announced today that it has signed a joint electrochemical deposition (ECD) applications lab agreement with Shanghai Sinyang Semiconductor Materials Co., Ltd.

SEMI seminar focuses on European packaging, assembly and test

04/14/2015  On June 18, the SEMI Packaging Tech Seminar will take place in Vila do Conde, Portugal.

Cavendish Kinetics adopts STATS ChipPAC's wafer level technology for its SmarTune RF MEMS tuners

04/07/2015  STATS ChipPAC Ltd. announced that Cavendish Kinetics, a provider of high performance RF MEMS tuning solutions for LTE smartphones and wearable devices, has adopted its advanced wafer level packaging technology

Flexible facilities for 450mm wafer fabs

04/07/2015  When the commercial semiconductor manufacturing industry decides to move to the next wafer size of 450mm, it will be time to re-consider equipment and facilities strategies.




HEADLINES

FINANCIALS



TECHNOLOGY PAPERS



Silicones Meet the Needs of the Electronics Industry

Remarkable silicones. The combination of their unique ability to maintain physical properties across a wide range of temperature, humidity, and frequency--combined with their flexibility--set them apart. Silicone based adhesives, sealants, potting and encapsulation compounds are used in hundreds of consumer, business, medical, and military electronic systems. In this white paper, learn what makes silicones different from other organic polymers, why their properties remain stable across different temperatures, and how they have played a major role in the rapid innovation of the electronics industry.May 12, 2015
Sponsored by Master Bond, Inc.,

ASIC Design Made Cost Effective with Low Cost Tools and Masks

For smaller projects or companies with modest design budgets, ASIC design is becoming a viable option due to low cost design tools and easy access to flexible, mature IC processes. This is especially compelling for developing mixed-signal ASICs for cost-sensitive sensor applications for the Internet of things (IoT). This paper discusses how costs and risks can be reduced using multi-project wafer services, coupled with affordable design tools for developing mixed-signal ASICs. April 13, 2015
Sponsored by Mentor Graphics

High-Performance Analog and RF Circuit Simulation

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Key challenges in the design of these circuits include block-level characterization and full-circuit verification. This paper highlights these verification challenges by discussing the results of a 2.2 GHz PLL LC-VCO, a 12-bit pipeline ADC, and an ultra-wideband transceiver.March 13, 2015
Sponsored by Mentor Graphics

More Technology Papers

WEBCASTS



Sensor Fusion and the Role of MEMS in IoT

Thursday May 28, 2015 at 1:00 p.m. EST

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

Sponsored By:
Interconnects

June 2015 (Date and time TBD)

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

Sponsored By:
Understanding Defects

July 2015 (Date and time TBD)

Yield improvement and production engineers working on today's ICs encounter many challenges as defects affecting device operation go undetected by traditional in-line techniques. Electrical Failure Analysis (EFA) is a suite of techniques that helps the modern day fab increase yields by isolating faults to areas small enough for Physical Failure Analysis (PFA). In this Webinar, we showcase a few of the proven EFA fault isolation techniques and describe how EFA helps to characterize the underlying defects.

Sponsored By:
More Webcasts

VIDEOS



EVENTS



SID Display Week 2015
San Jose, California
http://www.displayweek.org
May 31, 2015 - June 05, 2015
Design Automation Conference (DAC)
San Francisco, CA
https://dac.com
June 07, 2015 - June 11, 2015
SEMICON West 2015
San Francisco, CA
http://www.semiconwest.org
July 14, 2015 - July 16, 2015
SPIE Optics and Photonics
San Diego, CA
http://spie.org/x30491.xml
August 09, 2015 - August 13, 2015
European MEMS Summit
Milan, Italy
http://www.semi.org/eu/node/8871
September 17, 2015 - September 18, 2015
SPIE Photomask Technology 2015
Monterey, CA
http://spie.org/x6323.xml
September 29, 2015 - October 01, 2015