Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Semiconductor capital spending market in the US to reach over $31B by 2019

01/11/2016  Technavio's market research analysts estimate the semiconductor capital spending market in the US, to grow at a CAGR of around 9% between 2015 and 2019.

Worldwide semiconductor revenue declined 1.9% in 2015, Gartner reports

01/08/2016  Worldwide semiconductor revenue totaled $333.7 billion in 2015, a 1.9 percent decrease from 2014 revenue of $340.3 billion, according to preliminary results by Gartner, Inc.

Samsung, TSMC remain tops in available wafer fab capacity

01/07/2016  GlobalFoundries, TSMC, SK Hynix show greatest gains in wafer capacity in 2015.

A wild ride in 2015 - and two steps forward in 2016

01/07/2016  “In like a lion, out like a lamb” is just half the story for 2015. While initial expectations forecasted a double-digit growth year, the world economy faded and dragged our industry down to nearly flat 2015/2014 results.

Rudolph Technologies receives order for multiple NSX 330 Systems in Asia

01/05/2016  Rudolph Technologies, Inc., has received an order for over $15 million from a foundry in Asia for multiple NSX 330 Systems.

Startup Works on Ultralow-k Materials for Chips, Displays

12/21/2015  The very last presentation at the 12th annual 3D Advanced Semiconductor Integration and Packaging conference was given by Hash Pakbaz, president and chief executive officer of SBA Materials, a developer of nanoporous and mesoporous materials for semiconductor manufacturing and other applications.

3D ASIP Conference Hears from EDA, IC Gear Companies

12/18/2015  John Ferguson of Mentor Graphics provided the electronic design automation perspective on packaging technology at the 12th annual 3D ASIP conference in Redwood City, Calif.

Packaging Conference Addresses Challenges, Opportunities in New Technologies

12/18/2015  On the second day of the 12th annual 3D ASIP conference, the heavy hitters came out to talk. Attendees heard presentations from executives of Amkor Technology, the Defense Advanced Research Projects Agency (DARPA), Northrop Grumman, Taiwan Semiconductor Manufacturing, Teledyne Scientific & Imaging, and Xilinx, among other companies.

Conference Features "The Year of Stacked Memory" in 2015

12/17/2015  The theme of this year's 3D Architectures for Semiconductor Integration and Packading (3D ASIP) conference is "The Year of Stacked Memory," noting how memory die stacked in one package are becoming more commonplace in 2015.

Advanced semiconductor packaging drives materials consumption through 2019

12/15/2015  The $18 billion semiconductor packaging materials will undergo steady single-digit unit volume growth for many material segments through 2019, including laminate substrates, IC leadframes, underfill, and copper wire.

2016 bounce to modest gains

12/14/2015  After deflated 2015, 3D leads the way.

SEMI reports third quarter 2015 worldwide semiconductor equipment figures

12/11/2015  SEMI this week reported that worldwide semiconductor manufacturing equipment billings reached US$9.6 billion in the third quarter of 2015.

China Bolsters its IC Gear Business with Mattson Acquisition

12/10/2015  Mattson Technology agreed this month to be acquired by Beijing E-Town Dragon Semiconductor Industry Investment Center, a limited partnership in China, for about $300 million in cash.

Advanced lithography and electroplating approach to form high-aspect ratio copper pillars

12/08/2015  It is possible to fabricate copper pillars more than 100μm in height, with aspect ratios up to 6:1, using advanced packaging stepper lithography in conjunction with electroplating.

Variation in build-up substrate layer thicknesses and its impact on FCBGA BLR performance

12/08/2015  Subtleties in thicknesses between the alternating Cu metal and dielectric layers within a build-up substrate can impact BLR performance.

Smart Rock Bolt Wins Prize at Designers of Things Conference

12/07/2015  When it comes to Internet of Things products, most people would think of the Apple Watch or Fitbit fitness-tracking devices. A device aimed at the mining industry has proved to be a popular entry at the Designers of Things conference in San Jose, Calif.

CEA-Leti and CEA-Inac pave the way for quantum information processing on SOI CMOS platform

12/07/2015  CEA-Leti today announced preliminary steps for demonstrating a quantum bit, or qubit, the building block of quantum information, in a process utilizing a silicon-on-insulator (SOI) CMOS platform.

Leti to collaborate with Keysight Technologies to enable expansion of FD-SOI technology

12/07/2015  CEA-Leti today announced it has signed an agreement with Keysight Technologies, a device-modeling software supplier, to adapt Leti’s UTSOI extraction flow methodology within Keysight’s device modeling solutions for high-volume SPICE model generation.

Semiconductor sales: slight growth projected for next three years

12/07/2015  Market projected to grow by 0.2 percent in 2015, 1.4 percent in 2016, and 3.1 percent in 2017.

Mobile sector continues to dominate the advanced packaging market; IoT looms on the horizon

12/03/2015  Advanced packaging will reach 44% of packaging services and a revenue of US$ 30 billion by 2020.




TWITTER


WEBCASTS



Advanced Packaging: A Changing Landscape Rife with Opportunities

May 10, 2016 at 1 PM ET / Sponsored by Brewer Science

Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. Through-silicon vias are moving into volume packaging production, but problems with reliability, cost, and scaling remain. The supply chain also must adjust to this “mid” step between front- and back-end chip production. This webcast will explore the wafer thinning, bonding, TSV formation and other critical process steps necessary to enable 3D integration.

Sponsored By:
MEMS: Current Status and Future Directions

May 11, 2016 at 12 PM ET / Sponsored by Boston Semi Equipment

In 2015, the MEMS market did not grow as much as we initially expected. In the past, the Smart Phone industry was a strong driver of the MEMS industry with ever increasing volume. Today, MEMS are becoming commodity products with very low price. The webcast will review the latest market data and forecasts for the future. The MEMS “commoditization” paradox will be discussed as well as latest technical trends (sensors combos, packaging).

Sponsored By:
Fan-Out Wafer Level Packaging

May 26, 2016 at 1 PM ET / Sponsored by Zeta Instruments

Wafer level packaging (WLP) using fan-out technology is an attractive platform for achieving low-cost low-profile package solutions for smart-phones and tablets, which require cost-effective, high-density interconnects in small form-factor packaging. Assembled directly on a silicon wafer, the approach is unconstrained by die size, providing the design flexibility to accommodate an unlimited number of interconnects between the package and the application board for maximum connection density, finer line/spacing, improved electrical and thermal performance and small package dimensions to meet the relentless form factor requirements and performance demands of the mobile market. In this webcast, industry experts will explain the FOWLP process, discuss recent advances and forecast future trends.

Sponsored By:
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TECHNOLOGY PAPERS



Protecting Electronics with Parylene

This whitepaper provides a comprehensive overview of parylene conformal coating, advantages of parylene, and applications for parylene to protect electronic devices. As technology continues to advance, devices will encounter rugged environments and it is vital that they are properly protected. Parylene conformal coating is one way that manufacturers are giving their devices a higher level of protection, along with increasing the overall quality of their products. Parylene conformal coating applications for Electronics include: · I/O & PCI Modules · Power Converters and Supplies · Backplanes · Other Embedded Computing applications · Other specialty electronics and assemblies April 26, 2016
Sponsored by Diamond-MT

NMT: A Novel Technology for In-Line Ultra-Thin Film Measurements

XwinSys identified the semiconductors recent market trends and developed a novel XRF technology, named NMT: Noise-reduced Multilayer Thin-film measurement. This innovative approach can be used for in-line inspection and metrology features, to accurately and precisely analyze single and multi-layered elements in ultra-thin films. NMT novel technology can be utilized for in-line applications ranging from localized ultra-thin film stacks to the inspection of 3D localized features to the analysis of defects involving geometries, voids and material elements. February 23, 2016
Sponsored by XwinSys Technology Development Ltd.

Adhesives for Electronic Applications

Master Bond custom formulates epoxy adhesives, sealants, coatings, potting and encapsulation compounds to meet the rigorous needs of the electronic industry. We are a leading manufacturer of conformal coatings, glob tops, flip chip underfills, and die attach for printed circuit boards, semiconductors, microelectronics, and more. Browse our catalog to find out more.January 05, 2016
Sponsored by Master Bond, Inc.,

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EVENTS



SID Display Week 2016
San Francisco, CA
http://www.displayweek.org
May 22, 2016 - May 27, 2016
Design Automation Conference
Austin, TX
https://dac.com
June 05, 2016 - June 09, 2016
The ConFab
Las Vegas, NV
http://theconfab.com
June 12, 2016 - July 15, 2016
SEMICON West 2016
San Francisco, CA
http://www.semiconwest.org
July 12, 2016 - July 14, 2016

VIDEOS