Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



FlipChip International creates 250 multi-product wafer bump designs

10/01/2014  FlipChip International (FCI), the global technology leader in flip chip bumping and advanced wafer level packaging, announced that their engineering team had completed design and production of the 250th Multi-Product Wafer Bump design since January 2013.

NANIUM launches the industry’s largest WLCSP in volume production

09/23/2014  NANIUM today announced it has successfully launched the industry’s largest Wafer-Level Chip Scale Package (WLCSP) in volume.

SPIE Photomask Technology Wrap-up

09/23/2014  Extreme-ultraviolet lithography was a leading topic at the SPIE Photomask Technology conference and exhibition, held September 16-17-18 in Monterey, Calif., yet it wasn’t the only topic discussed and examined. Mask patterning, materials and process, metrology, and simulation, optical proximity correction (OPC), and mask data preparation were extensively covered in conference sessions and poster presentations.

SPIE panel tackles mask complexity issues

09/19/2014  Photomasks that take two-and-a-half days to write. Mask data preparation that enters into Big Data territory. And what happens when extreme-ultraviolet lithography really, truly arrives?

ASML on EUV: Available at 10nm

09/17/2014  Extreme-ultraviolet lithography systems will be available to pattern critical layers of semiconductors at the 10-nanometer process node, and EUV will completely take over from 193nm immersion lithography equipment at 7nm, according to Martin van den Brink, president and chief technology officer of ASML Holding.

Design and Manufacturing Technology Development in Future IC Foundries

09/16/2014  Virtual Roundtable provides perspective on the need for greater integration within the “fabless-foundry” ecosystem.

Monolithic 3D breakthrough at IEEE S3S 2014

09/15/2014  In the upcoming 2014 IEEE S3S conference (October 6-9), MonolithIC 3D will unveil a breakthrough flow that is game-changing for 3D IC. For the first time ever monolithic 3D (“M3DI”) could be built using the existing fab and the existing transistor flow.

Process Watch: Sampling matters

09/15/2014  Determining an optimum sampling strategy comes down to weighing the cost of process control against the benefit of capturing the defect or other excursion in a timely manner.

Foundry, EDA partnership eases move to advanced process nodes

09/15/2014  A leading semiconductor foundry and an EDA vendor with design-for-yield (DFY) solutions have enjoyed a long-term partnership. Recently, they worked together to leverage DFY technologies for process technology development and design flow enhancement.

Research Alert: September 9, 2014

09/09/2014  GLOBALFOUNDRIES and SRC announce new scholarship for undergraduate engineering students; Layered graphene sandwich for next generation electronics; Doped graphene nanoribbons with potential

Fermilab implements Ziptronix's DBI hybrid bonding in high-end 3D image sensors

09/09/2014  Ziptronix Inc. today announced that its Direct Bond Interconnect (DBI) hybrid bonding has been implemented by Fermi National Accelerator Laboratory (Fermilab) to improve the performance of high-end 3D sensor arrays, which are used for particle detection in large-scale particle physics and x-ray imaging experiments.

The Week in Review: September 5, 2014

09/05/2014  New non-volatile memory technology; President and CEO of FSA announced; Samsung to use ProPlus 14nm finFET SPICE modeling platform; MEMS gyroscope from Analog Devices; SEMICON Taiwan held this week

Research Alert: September 3, 2014

09/03/2014  A new, tunable device for spintronics; Copper shines as flexible conductor; Competition for graphene

Intel Announces “New Interconnect” for 14nm

09/02/2014  Intel has just announced that “Embedded Multi-die Interconnect Bridge (EMIB”) packaging technology will be available to 14nm foundry customers.

The Week in Review: August 29, 2014

08/29/2014  Intel releases new packaging technologies; Fairchild Semiconductor to close two facilities; KLA-Tencor introduces new metrology tools; UMC joins Fujitsu's new foundry company; Thinnest-possible semiconductor; SEMI announces keynotes for Vietnam Semiconductor Strategy Summit

Lithography: What are the alternatives to EUV?

08/28/2014  Hopes remain high for EUV, but long delays has caused attention to shift to various alternatives.

The Week in Review: August 22, 2014

08/22/2014  Collaboration for next-generation smart glasses; Book-to-bill ratio holds steady in July; Intel and Unity to collaborate; MediaTek launches new R&D facility; Amkor appoints new member to board of directors; STATS ChipPAC achieves shipping milestone

STATS ChipPAC’s fcCuBE technology surpasses 100 million unit milestone

08/20/2014  STATS ChipPAC Ltd., a provider of advanced semiconductor packaging and test services, announced today that it has shipped over 100 million semiconductor packages with the company’s fcCuBE technology, advanced flip chip packaging with fine pitch copper (Cu) column bumps, Bond-on-Lead (BOL) interconnection and enhanced assembly processes.

The Week in Review: August 15, 2014

08/15/2014  The growing semiconductor market in India; MEMSIC's monolithic, wafer-level packaged accelerometer; Si2 adds new director of 3DIC Programs; Worldwide silicon wafer area shipments increased during the second quarter 2014; LightFair announces Call for Speakers

MEMSIC introduces the world's first monolithic and wafer level packaged 3D-axis accelerometer

08/15/2014  MEMSIC, Inc., a MEMS sensing solution provider, announced today the availability of its MXC400xXC, the world's first monolithic 3D accelerometer, and also the first 3D accelerometer to utilize WLP technology.




FINANCIALS



TECHNOLOGY PAPERS



Epoxies and Glass Transition Temperature

Gain a better understanding about glass transition temperature (Tg) and why it is one of many factors to consider for bonding, sealing, coating and encapsulation applications. In this paper, we explore how temperature impacts the performance of polymers, why glass transition temperature is significant, and how it is measured. Tg can be an extremely useful yardstick for determining the reliability of epoxies as it pertains to temperature.January 09, 2015
Sponsored by Master Bond, Inc.,

Enhancing the Reliability of Flip Chip Assemblies with Underfill Encapsulants

The development of epoxy based underfill encapsulants marked a turning point for flip chip technology, and the semiconductor industry. Underfill encapsulants are carefully formulated to ensure flowability, an acceptable CTE, and other desirable properties. In this white paper, we explore what properties are required for effective underfills to ensure reliability and quality in flip chip applications.October 07, 2014
Sponsored by Master Bond, Inc.,

Conformal Coatings for Reliable Electronic Assemblies

Modern electronics have become part of our daily lives and the sophisticated electronic circuitry at the heart of these devices and systems must be reliable. Conformal coatings act as a barrier between the electronics and the environment, protecting the areas they cover while strengthening delicate components and traces. Find out more about how conformal coatings enhance the reliability and longevity of electronic printed circuit boards.April 24, 2014
Sponsored by Master Bond, Inc.,

More Technology Papers

WEBCASTS



FinFETs

February 2015 (Date and time TBD)

FinFETs provide better performance than planar transistor architectures, but the entire 3D structure requires strict process control, including fin and gate dimensions, profiles and roughness, and metal gate undercuts. As more advanced node semiconductors enter production, the application of HKMG will be key to yield and cost improvement. Advanced wafer fab tools are needed for HKMG, such as ALD.

Sponsored By:

3D Integration

March 2015 (Date and time TBD)

Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. Through-silicon vias are moving into volume packaging production, but problems with reliability, cost, and scaling remain. The supply chain also must adjust to this “mid” step between front- and back-end chip production. This webcast will explore the wafer thinning, bonding, TSV formation and other critical process steps necessary to enable 3D integration.

Sponsored By:

Materials

April 2015 (Date and time TBD)

Success in electronics manufacturing increasingly relies on the materials used in production and packaging. In this webcast, experts will focus on changing material requirements, the evolving material supply chain, recent advances in process and packaging materials and substrates, and the role new materials will play in the future.

Sponsored By:
More Webcasts

VIDEOS



EVENTS



SEMICON Korea 2015
Seoul, Korea
http://www.semiconkorea.org/en/
February 04, 2015 - February 06, 2015
LithoVision 2015
San Jose, California United States
https://www.nikonprecision.com/lithovision/
February 22, 2015 - February 22, 2015
The ConFab
Las Vegas, Nevada
http://www.theconfab.com
May 19, 2015 - May 22, 2015
SEMICON West 2015
San Francisco, CA
http://www.semiconwest.org
July 14, 2015 - July 16, 2015