Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



TI to open 300mm wafer bumping facility in Chengdu, China

11/06/2014  Chengdu assembly/test facility now in production; site celebrates grand opening

Experts at the Table: Focus on Semiconductor Materials

11/03/2014  The cutting edge in semiconductor manufacturing has meant not only big changes in IC design and process technology, but also in semiconductor materials. Experts weigh in from Linde Electronics; Kate Wilson of Edwards Vacuum; David Thompson of Applied Materials; and Ed Shober of Air Products and Chemicals.

Air-gaps in Copper Interconnects for Logic

10/31/2014  Intel’s “14nm-node” process uses air-gaps in dielectrics; direction disclosed four years ago.

SEMI extends ASMC Call for Papers deadline to November 10

10/30/2014  SEMI announced today that the deadline for presenters to submit an abstract for the 26th annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) is extended to November 10.

IBM to pay GlobalFoundries $1.5B to take over chip fabs

10/20/2014  IBM and GLOBALFOUNDRIES today announced that GLOBALFOUNDRIES will acquire IBM's global commercial semiconductor technology business.

Growing momentum in semiconductor manufacturing in Vietnam

10/17/2014  The 2nd annual SEMI Vietnam Semiconductor Strategy Summit, co-organized with the Saigon Hi-Tech Park and with FabMax as the premier sponsor, was held September 16-17, 2014 in Ho Chi Minh City.

Deeper Dive -- Mentor Graphics Looks to the Future

10/14/2014  There has been a great deal of handwringing and naysaying about the industry’s progress to the 14/16-nanometer process node, along with wailing and gnashing of teeth about the slow progress of extreme-ultraviolet lithography, which was supposed to ease the production of 14nm or 16nm chips. Joseph Sawicki, vice president and general manager of Mentor’s Design-to-Silicon Division, is having none of it.

Semiconductor market in India is expected to reach US$ 52.58B by 2020

10/14/2014  India has a very large industry base of electronics items, but there is little manufacturing base for semiconductors.

Mentor Graphics wins $36M in patent infringement suit

10/13/2014  A Portland, Oregon jury today delivered a verdict in favor of Mentor Graphics in a patent infringement trial against Synopsys, Inc., awarding Mentor Graphics $35 million in damages and royalties.

FlipChip International creates 250 multi-product wafer bump designs

10/01/2014  FlipChip International (FCI), the global technology leader in flip chip bumping and advanced wafer level packaging, announced that their engineering team had completed design and production of the 250th Multi-Product Wafer Bump design since January 2013.

NANIUM launches the industry’s largest WLCSP in volume production

09/23/2014  NANIUM today announced it has successfully launched the industry’s largest Wafer-Level Chip Scale Package (WLCSP) in volume.

SPIE Photomask Technology Wrap-up

09/23/2014  Extreme-ultraviolet lithography was a leading topic at the SPIE Photomask Technology conference and exhibition, held September 16-17-18 in Monterey, Calif., yet it wasn’t the only topic discussed and examined. Mask patterning, materials and process, metrology, and simulation, optical proximity correction (OPC), and mask data preparation were extensively covered in conference sessions and poster presentations.

SPIE panel tackles mask complexity issues

09/19/2014  Photomasks that take two-and-a-half days to write. Mask data preparation that enters into Big Data territory. And what happens when extreme-ultraviolet lithography really, truly arrives?

ASML on EUV: Available at 10nm

09/17/2014  Extreme-ultraviolet lithography systems will be available to pattern critical layers of semiconductors at the 10-nanometer process node, and EUV will completely take over from 193nm immersion lithography equipment at 7nm, according to Martin van den Brink, president and chief technology officer of ASML Holding.

Design and Manufacturing Technology Development in Future IC Foundries

09/16/2014  Virtual Roundtable provides perspective on the need for greater integration within the “fabless-foundry” ecosystem.

Monolithic 3D breakthrough at IEEE S3S 2014

09/15/2014  In the upcoming 2014 IEEE S3S conference (October 6-9), MonolithIC 3D will unveil a breakthrough flow that is game-changing for 3D IC. For the first time ever monolithic 3D (“M3DI”) could be built using the existing fab and the existing transistor flow.

Process Watch: Sampling matters

09/15/2014  Determining an optimum sampling strategy comes down to weighing the cost of process control against the benefit of capturing the defect or other excursion in a timely manner.

Foundry, EDA partnership eases move to advanced process nodes

09/15/2014  A leading semiconductor foundry and an EDA vendor with design-for-yield (DFY) solutions have enjoyed a long-term partnership. Recently, they worked together to leverage DFY technologies for process technology development and design flow enhancement.

Research Alert: September 9, 2014

09/09/2014  GLOBALFOUNDRIES and SRC announce new scholarship for undergraduate engineering students; Layered graphene sandwich for next generation electronics; Doped graphene nanoribbons with potential

Fermilab implements Ziptronix's DBI hybrid bonding in high-end 3D image sensors

09/09/2014  Ziptronix Inc. today announced that its Direct Bond Interconnect (DBI) hybrid bonding has been implemented by Fermi National Accelerator Laboratory (Fermilab) to improve the performance of high-end 3D sensor arrays, which are used for particle detection in large-scale particle physics and x-ray imaging experiments.




HEADLINES

FINANCIALS



TECHNOLOGY PAPERS



ASIC Design Made Cost Effective with Low Cost Tools and Masks

For smaller projects or companies with modest design budgets, ASIC design is becoming a viable option due to low cost design tools and easy access to flexible, mature IC processes. This is especially compelling for developing mixed-signal ASICs for cost-sensitive sensor applications for the Internet of things (IoT). This paper discusses how costs and risks can be reduced using multi-project wafer services, coupled with affordable design tools for developing mixed-signal ASICs. April 13, 2015
Sponsored by Mentor Graphics

High-Performance Analog and RF Circuit Simulation

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Key challenges in the design of these circuits include block-level characterization and full-circuit verification. This paper highlights these verification challenges by discussing the results of a 2.2 GHz PLL LC-VCO, a 12-bit pipeline ADC, and an ultra-wideband transceiver.March 13, 2015
Sponsored by Mentor Graphics

How to Use Imaging Colorimeters for FPD Automated Visual Inspection

The use of imaging colorimeter systems and analytical software to assess display brightness and color uniformity, contrast, and to identify defects in FPDs is well established. A fundamental difference between imaging colorimetry and traditional machine vision is imaging colorimetry's accuracy in matching human visual perception for light and color uniformity. This white paper describes how imaging colorimetry can be used in a fully-automated testing system to identify and quantify defects in high-speed, high-volume production environments.February 27, 2015
Sponsored by Radiant Vision Systems

More Technology Papers

WEBCASTS



Trends in Materials: The Smartphone Driver

Thursday, April 30, 2015 at 1:00 p.m. EST

To understand 3-D FinFET doping and high mobility channel material, this talk will first review the current doping and Fin/channel mobility enhancement techniques used for 22nm FinFET production by Intel for both high performance logic and SOC devices and the changes they made for their 2nd generation 14nm FinFET.

Sponsored By:
MEMS

May 2015 (Date and time TBD)

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

Sponsored By:
Interconnects

June 2015 (Date and time TBD)

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

Sponsored By:
More Webcasts

VIDEOS



EVENTS



ASMC 2015
Saratoga Springs, NY
http://www.semi.org/en/asmc2015
May 03, 2015 - May 06, 2015
The ConFab
Las Vegas, Nevada
http://www.theconfab.com
May 19, 2015 - May 22, 2015
65th Annual ECTC
San Diego, CA
http://www.ectc.net
May 26, 2015 - May 29, 2015
SID Display Week 2015
San Jose, California
http://www.displayweek.org
May 31, 2015 - June 05, 2015
Design Automation Conference (DAC)
San Francisco, CA
https://dac.com
June 07, 2015 - June 11, 2015
SEMICON West 2015
San Francisco, CA
http://www.semiconwest.org
July 14, 2015 - July 16, 2015