Wafer Processing

WAFER PROCESSING ARTICLES



Solving an organic semiconductor mystery

01/16/2015  Berkeley Lab researchers uncover hidden structures in domain interfaces that hamper performance.

AKHAN Semiconductor first to invent fully transparent circuit creation process

01/15/2015  Adam Khan, founder and CEO of AKHAN Semiconductor, Inc. was granted a US patent by the US Patent and Trademark Office today for a groundbreaking process that adheres diamond, the only truly transparent semiconductor, to metals and alloys (including transparent metals) in a way that allows for reliable wire bonding and high conductivity.

UC Berkeley Extension launches three online programs in semiconductor technology

01/15/2015  UC Berkeley Extension announces three online integrated circuit (IC) semiconductor technology programs to meet the training needs of the surging worldwide semiconductor industry; the industry is predicted to reach $345 billion in sales this year.

Orbotech announces collaboration between SPTS and Fraunhofer on process development of wafer level packaging

01/15/2015  Orbotech Ltd. today announced that SPTS Technologies is collaborating with Fraunhofer IZM, an international institute specializing in applied and industrial contract research, on next generation wafer level packaging of microelectronic devices.

SAMCO announces MOCVD demonstration availability for the GaN-550 MOCVD system

01/15/2015  SAMCO has announced MOCVD demonstration capability on a new gallium nitride (GaN-on-Si) system, the GaN-550, from Valence Process Equipment Inc.

Two companies honored with SEMI Award

01/14/2015  SEMI today announced that two companies, Brewer Science and Advanced Semiconductor Engineering, Inc. (ASE), are recipients of the 2014 SEMI Award for North America.

JEOL and UC Irvine partner to develop electron microscopy and materials research center

01/14/2015  JEOL USA and the University of California's Irvine Materials Research Institute (IMRI) have entered into a strategic partnership to create a premier electron microscopy and materials science research facility.

SUNY Board appoints Dr. Alain Kaloyeros as founding president of SUNY Polytechnic Institute

01/14/2015  SUNY Polytechnic Institute (SUNY Poly) yesterday announced the SUNY Board of Trustees has appointed Dr. Alain Kaloyeros as the founding President of SUNY Poly.

Graphene plasmons go ballistic

01/12/2015  Graphene combined with the insulting power of boron nitride enables light control in tiny circuits with dramatically reduced energy loss.

Silicon Space Technology partners with GLOBALFOUNDRIES to deliver processors and memory solutions

01/09/2015  Silicon Space Technology, an industry innovator in high-temp and rad-hard embedded system solutions, announced today the company has partnered with GLOBALFOUNDRIES to build commercial-ready products for extreme environments and applications.

GLOBALFOUNDRIES and Linear Dimensions to offer joint analog solution for wearables and MEMs sensors markets

01/09/2015  GLOBALFOUNDRIES and Linear Dimensions Semiconductor Inc. today announced that they are working together to manufacture a 14-channel programmable reference from Linear Dimensions for multiple markets including IoT (Internet of Things) sensor and wearable device applications.

Freshmen-level chemistry solves the solubility mystery of graphene oxide films

01/06/2015  A Northwestern University-led team recently found the answer to a mysterious question that has puzzled the materials science community for years--and it came in the form of some surprisingly basic chemistry.

Global semiconductor sales in November outpace 2013 totals

01/05/2015  The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing and design, today announced that worldwide sales of semiconductors reached $29.7 billion for the month of November 2014.

Solid Doping for Bulk FinFETs

01/05/2015  In another example of the old one-liner that “all that is old is new again,” the old technique of solid-source doping is being used by Intel for a critical process step in so-called “14nm node” finFET manufacturing.

A new hardmask process, Saphira

12/23/2014  A new hardmask material and process was introduced this month by Applied Materials. Designed for advanced logic and memories, including DRAM and vertical NAND, the hardmask is transparent, which simplifies processing.

Global semiconductor market set for strongest growth in four years in 2014

12/23/2014  Worldwide semiconductor market revenue is on track to achieve a 9.4 percent expansion this year, with broad-based growth across multiple chip segments driving the best industry performance since 2010.

Hands on: Crafting ultrathin color coatings

12/22/2014  In Harvard's high-tech cleanroom, applied physicists produce vivid optical effects on paper.

Piezoelectricity in a 2-D semiconductor

12/22/2014  Berkeley Lab researchers discovery of piezoelectricty in molybdenum disulfide holds promise for future MEMS.

Eliminating electrostatic discharge: Protecting tomorrow's technology

12/22/2014  A new range of dissipative materials based on fluoroelastomer and perfluoroelastomer polymers is designed for wafer processing and wafer handling applications.

IoT's divergent needs will drive different types of technologies

12/19/2014  Given the current buzz around the Internet of Things (IoT), it is easy to lose sight of the challenges – both economic and technical.




HEADLINES

FINANCIALS



TECHNOLOGY PAPERS



ASIC Design Made Cost Effective with Low Cost Tools and Masks

For smaller projects or companies with modest design budgets, ASIC design is becoming a viable option due to low cost design tools and easy access to flexible, mature IC processes. This is especially compelling for developing mixed-signal ASICs for cost-sensitive sensor applications for the Internet of things (IoT). This paper discusses how costs and risks can be reduced using multi-project wafer services, coupled with affordable design tools for developing mixed-signal ASICs. April 13, 2015
Sponsored by Mentor Graphics

High-Performance Analog and RF Circuit Simulation

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Key challenges in the design of these circuits include block-level characterization and full-circuit verification. This paper highlights these verification challenges by discussing the results of a 2.2 GHz PLL LC-VCO, a 12-bit pipeline ADC, and an ultra-wideband transceiver.March 13, 2015
Sponsored by Mentor Graphics

How to Use Imaging Colorimeters for FPD Automated Visual Inspection

The use of imaging colorimeter systems and analytical software to assess display brightness and color uniformity, contrast, and to identify defects in FPDs is well established. A fundamental difference between imaging colorimetry and traditional machine vision is imaging colorimetry's accuracy in matching human visual perception for light and color uniformity. This white paper describes how imaging colorimetry can be used in a fully-automated testing system to identify and quantify defects in high-speed, high-volume production environments.February 27, 2015
Sponsored by Radiant Vision Systems

More Technology Papers

WEBCASTS



3D Integration: The Most Effective Path for Future IC Scaling

Thursday, April 23, 2015 at 12:00 p.m. EST

It is well recognized that dimensional scaling has reached its diminishing return phase. The industry is now looking at monolithic 3D to be the future technology driver. Yet, until recently, the path to monolithic 3D has required the development of new transistor types and processes. This Webcast will present game-changing monolithic 3D process flows which use the existing transistor of existing manufacturing line and existing process flows. Now the most effective path for future IC scaling is indeed monolithic 3D, which offers the lowest development and manufacturing cost for future ICs.

Sponsored By:
Trends in Materials: The Smartphone Driver

Thursday, April 30, 2015 at 1:00 p.m. EST

To understand 3-D FinFET doping and high mobility channel material, this talk will first review the current doping and Fin/channel mobility enhancement techniques used for 22nm FinFET production by Intel for both high performance logic and SOC devices and the changes they made for their 2nd generation 14nm FinFET.

Sponsored By:
MEMS

May 2015 (Date and time TBD)

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

Sponsored By:
More Webcasts

VIDEOS



EVENTS



SEMICON Southeast Asia 2015
Penang, Malaysia
http://www.semiconsea.org
April 22, 2015 - April 24, 2015
ASMC 2015
Saratoga Springs, NY
http://www.semi.org/en/asmc2015
May 03, 2015 - May 06, 2015
The ConFab
Las Vegas, Nevada
http://www.theconfab.com
May 19, 2015 - May 22, 2015
65th Annual ECTC
San Diego, CA
http://www.ectc.net
May 26, 2015 - May 29, 2015
SID Display Week 2015
San Jose, California
http://www.displayweek.org
May 31, 2015 - June 05, 2015