Webcasts





The Rise of MEMS Sensors


May 07, 2014

June 19, 2014 at 12 p.m. EST MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.





Trends in Packaging


May 07, 2014

June 26, 2014 at 1 p.m. EST The industry continues to develop new approaches to packaging, including 3D integration, redistribution layers (RDL), through silicon vias (TSV), copper pillars, and wafer-level packaging (WLP). These and other approaches will be discussed in this webcast.





2.5D and 3D Packaging at the Tipping Point


May 07, 2014

July 1, 2014 at 1 p.m. EST Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. The time of HVM is fast approaching for 2.5D interposer and memory based 3D packages, with commentators expecting significant product announcements to be made over the next 12 - 18 months. This webcast will discuss why now is the right time for these next generation packages. The presenters will also discuss the backside via reveal module in the MEOL, and show how innovative wafer process engineering delivers cost and performance benefits to fuel the growth of 2.5 and first generation 3D devices.




Multiphysics Modeling of MEMS Devices


March 31, 2014

April 30 at 2:00 p.m. ET. Microelectromechanical systems (MEMS), such as actuators, sensors and resonators, rely on the interactions between multiple physical effects. In this webinar, we will show how a multiphysics simulation approach allows you to combine electrical, thermal and structural effects accurately in order to design reliable and high-performance MEMS devices.




3D Integration and Advanced Packaging Innovation


March 20, 2014

March 27 at 1:00 p.m. ET 2.5/3D integration and advanced packaging enable better chip performance in a smaller form factor, meeting the needs of smartphones, tablets, and other advanced devices. However, 2.5/3D packaging creates a new set of manufacturing challenges, such as the need to fabricate copper pillars, TSVs, wafer bumping and redistribution layers – which may involve thicker photoresists, spin-on dielectrics and BCB coatings -- and processing may be done on panels instead of round wafers. In this webcast, experts will detail various options, future scenarios and challenges that must still be overcome.




Materials for Semiconductor Manufacturing


December 06, 2013

Dec 18 at 1 p.m. EST. Success in electronics manufacturing increasingly relies on the materials used in production and packaging. In this webcast, experts will focus on changing material requirements, the evolving material supply chain, recent advances in process and packaging materials and substrates, and the role new materials such as carbon nanotubes will play in the future.




Next Generation Metrology and Inspection


October 17, 2013

Nov 21 at 2 PM ET. Continued scaling and more complex device structures, including FinFETs and 3D stacking, are creating new challenges in metrology and inspection. Smaller defects must be detected and analyzed on an increasingly diverse set of materials. Chip makers are looking for better wafer edge inspection techniques, higher resolution metrology tools, 450mm-capability and new compositional analysis solutions. Experts will describe new approaches for next generation metrology and inspection, including measurements of CDs, stress, film thickness and non-visual defects.






Advanced Packaging


September 23, 2013

Packaging technology is driven by a combination of cost, performance, form factor and reliability. This webcast will examine new advances in conventional back-end packaging, including wafer bumping and copper wire bonding, as well as the role of new 2.5D and 3D integration. Presenters will focus on isssues related to cost, performance (speed, power and noise immunity), form factor (thickness, weight, PCB area consumption), and testability, as well as the tradeoff of technical maturity versus risk in high-volume manufacturing.