(September 20, 2005) Mountain View, Calif. — MEPTEC’s next one-day technical symposium is titled “Roadmaps for the Next Generation of Semiconductor Packaging,” and will be held on November 17, 2005 in San Jose, Calif. Presentations from such product/device sectors as ASIC/PLD, analog, memory, graphics, microprocessor, and FPGA will discuss their companies’ future horizons in device applications, and what some of the critical technology or market roadblocks may be in reaching those goals.
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