ALD comes to single-metal high-k gate stacks

by Katherine Derbyshire, contributing editor, Solid State Technology

May 23, 2008 – Though semiconductor researchers spent years trying to identify an alternative to SiO2 for the transistor gate dielectric, it turns out that search was the easy part. Now that the industry consensus has identified hafnium-based oxides and silicates as the best high dielectric constant (k) alternatives, manufacturers are facing the twin challenges of reliability and yield.

Control of the interface between the metal gate and the hafnium-based dielectric has been one of the most difficult issues for high-k integration schemes. ASM International’s new cap layer atomic layer deposition (ALD) processes help improve interface quality while simplifying process integration.

As explained by Glen Wilk, ASM’s product manager for transistor products, the integration challenge is this: hafnium-based dielectrics require metallic gate electrodes. However, the standard gate first approach exposes these electrodes to the high temperature source/drain activation anneals. At temperatures in excess of 1000°C, many candidate metals are unstable and react with the dielectric layer. Only a few noble metals, such as platinum and ruthenium alloys, offer both stability at high temperatures and the work function needed for high performance PMOS transistors.

Noble metals are notoriously difficult to work with, as they are resistant to most etch chemistries. Most manufacturers would also rather avoid the complications inherent in a dual metal process. One attractive alternative places a cap layer between the hafnium-based dielectric and the metal. This cap layer defines the interface work function, allowing a single metal (usually TiN or TaN) to serve as the electrode for both nMOS and pMOS transistors. Most proposed integration schemes use lanthanum oxide (LaOx) as the nMOS cap, with aluminum oxide (AlOx) as the pMOS cap.

Sputtering has usually been used for both cap layer depositions. Unlike chemical vapor deposition (CVD) or ALD, sputtering requires no precursor vapors, only a metallic target. Unfortunately, sputtering can easily damage the exposed dielectric layer, one of the most critical surfaces in the transistor structure. Moreover, as the dielectric is generally deposited by ALD, switching to a sputtering system exposes the dielectric surface to possible contamination.

ASM has now announced that it has developed ALD processes for both LaOx and AlOx. Since both materials are deposited from solid precursors, Wilk explained, reliable ALD deposition requires careful process control and a robust precursor delivery system. Lanthanum in particular is highly reactive with water. The ALD hardware must be able to prevent moisture contamination from the time the precursor is loaded into the delivery system until it reaches the system exhaust; otherwise, clogs and contamination are likely. ASM claims that its Polygon platform and Pulsar process modules offer a reliable platform for sequential deposition of dielectric and cap layers in a gate-first process. The company now offers ALD processes for all three layers in an advanced gate stack: dielectric, cap, and metal. — K.D.

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