by Debra Vogler, senior technical editor, Solid State Technology
Brion Technologies, a division of ASML, unveiled its Tachyon SMO, a new source mask optimization (SMO) product targeted for the 22nm node, at the SPIE Advanced Lithography Conference. The previous generation product is currently in use at the “leading logic and memory” manufacturers. The new technology enables full co-optimization of source and mask.
The product incorporates ASML scanner measured parameters and a proprietary pupil modeling capability, enabling end users to optimize both standard and custom illumination solutions. Full-chip extension is achieved through the generation of a process model in the standard Tachyon format for use in production OPC and verification.
Source-Mask Optimizer (SMO) is an ASML proprietary software product that simultaneously optimizes the ASML scanner illumination shape and settings, and the model-based OPC for critical low k1 structures. SMO features include full integration with access to the ASML scanner specification database, multi-chip optimization with weighting, overlapping process window, edge placement error (EPE) and mask error enhancement factor (MEEF) as metrics.
The company says that process window improvements of >40% have been achieved with the new technology relative to previous iterative techniques. The new product is available immediately.