IEDM Preview: CMOS imager works from light to night

by Laura Peters, contributing editor

IEDM Previews:
How strain can protect devices from ESD
SEMATECH tipping III-V MOSFET, FinFET, and resistive RAM
TSMC anneal for gate-last HKMG process
Imec IEDM presentations to cover More than Moore, ITRS
When do TSV stresses affect device operation?
Multi-threshold-voltage flexibility in FDSOI
CMOS imager works from light to night
Carbon nanotube vias approach production densities
IBM Alliance simplifies pFET HKMG
IM Flash details 25nm NAND

October 22, 2010 – Traditional CMOS image sensors based on silicon are limited to imaging in the visible and near infrared (IR) spectrum. But for homeland security, automotive safety and other applications that rely on detection of the earth’s natural "night glow," extension into the short-wave IR (SWIR) band is needed.

Researchers from NoblePeak Vision Corp. (Wakefield, MA), will explain how they integrated a low-noise, high quantum-efficiency germanium (Ge) photodiode into a 10μm-pitch VGA-compatible CMOS sensor at the upcoming International Electron Devices Meeting (IEDM, 12/6-8 in San Francisco, CA). The CMOS sensor absorbs light from visible to 1.6μm, enabling high-resolution night imaging under moonless conditions. According to the research team, this is the first large-scale integration of single-crystal germanium (Ge) diodes into a silicon imager.

To date, one challenge in building quality Ge-on-Si diodes has been the high thermal budget associated with reducing Ge dislocation densities caused by the Ge/Si lattice mismatch of 4%. Using a high aspect (AR) ratio connection between the germanium and silicon, the NoblePeak process induces in-plane tension, which extends the absorption band edge of the germanium, helping the sensor to capture night glow at peaks of 1.3μm and 1.6μm. Based on a standard 0.18μm CMOS foundry flow, process details are shown in Figure 1. The team packaged the imagers with a thermoelectric cooler (-80°C) and incorporated them into a compact camera.

Figure 1. Ge diode integration flow. a) CMOS-to-contact formation; b) deposit Ge well dielectric, pattern Ge well and high AR Si seeding stem to form dual cavity; c) grow Si epi, CMP, form n and p regions in Ge by ion implant, deposit Ge interlayer dielectric; d) form Ge contact and stacked contact to CMOS, standard BEOL, microlens formation. (Source: NoblePeak)

Pixel quantum efficiency (QE) is defined as the electrons collected by the circuitry relative to photons incident on the pixel. The group found that QE was a function of fill factor and reflections in the dielectric stack, losses to the silicon substrate or dielectric, and quality of the metallization pattern. Packaged testing of devices revealed a pixel QE of 44% at 1.3μm at full VGA resolution and 32% at half resolution (Figure 2).

Diode dark current (i.e., leakage current) measured at wafer probe at -45°C was 25 fA/pixel. The team traced the primary leakage mechanism to traps within the space-charge region of the diode.

For SWIR imaging, an alternative is a room-temperature InGaAs SWIR sensor for military applications. However, this approach requires integration with a long-wavelength thermal sensor for full bandwidth coverage. Another image sensor option, which allows extension into the near-IR, involves copper indium gallium selenide (CIGS)-on-CMOS for automotive and security applications.

Figure 2. Pixel quantum efficiency and dark current. Wafer probe results show median pixel quantum efficiency and dark current of all pixels in each VGA imager measured at full and half-resolution. Optical power was 3μW/cm2. (Source: NoblePeak)


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