ALD enables 3D capacitors for CEA-Leti and IPDiA

April 10, 2012 — Research organization CEA-Leti and passive component maker IPDiA developed an atomic layer deposition (ALD) process to apply medium-k dielectric layers on a metal-insulator-metal capacitor architecture, enabling 3D capacitors. The project took less than 2 years.

ALD enables conformal coating of high aspect ratio surfaces and exact thickness control at the atomic level. A capacitance density of 550nF/mm2 was obtained by keeping leakage current and parasitic levels as low as in the 250nF/mm2 PICS3 product.

The PICS high-density capacitors utilize vertical space to increase the capacitor surface, and therefore capacitance, without increasing the device footprint. Temperature, voltage, and aging tests revealed stability with this ALD-based process. The PICS capacitors show very low parasitic elements (ESR, ESL) and can outperform MLCCs, tantalum capacitors, or other discretes in a much smaller volume, the partners report.

Initial applications include high-reliability devices in medical, harsh environment, automotive, communication, industrial, and defense/aerospace markets. Examples include DC/DC converter and decoupling functions within limited space: IC decoupling, MEMS, sensors, memory sticks, smartcards, etc.

IPDiA unveiled its results at the Device Packaging 2012 conference in Scottdale, AZ, USA.

IPDiA and CEA-Leti will now work on stabilizing the ALD process and readying the product for market. The goal is 1

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