Process Watch: The dangerous disappearing defect

“The Dangerous Disappearing Defect” is the first article in a new series called Process Watch. Authored by experts at KLA-Tencor, Process Watch articles focus on novel process control solutions for chip manufacturing at the leading edge.

Finding and classifying defects on a wafer is a statistics game. The defect pareto—the bar graph showing the number of defects by type caught by the defect inspector and identified by the e-beam review system—drives the actions of the defect engineers in the fab. However, it’s not necessarily the tallest bar in the graph that tells the experienced defect engineer how to fix a defect problem. Far too often, the tallest bar is the insidious “SNV”—SEM Non-Visual. Some fabs bluntly label this category “Not Found.”

It might be more accurate to call the category “Not Found Again.” The defect inspection system did indeed find these defects and reported them in the KLARF, the output file that lists the locations of the defects detected on the wafer along with some descriptive information such as the size of the scattering signal associated with them. The “Not Found” problem arose when the wafer was moved to the e-beam review system to identify defect type. As the e-beam review system drove to the sites of the defects found by the inspection tool, sometimes it didn’t see a defect. This situation can arise for any of several reasons. First, the inspection system could have experienced a glitch, a result of electrostatic discharge or system noise, and therefore reported a false event. Second, misalignment between the coordinate system of the inspector and that of the e-beam review system could have resulted in the defect lying outside the field of view (FOV) of the e-beam review system. Third, the inspection system could have detected a defect at a previous layer that’s covered by a film transparent to the (optical) inspection system but not to the e-beam review system. Fourth, the defect could have arisen from nuisance variation, such as line-edge roughness, that shows up as a defect when the inspector uses a die-to-die detection algorithm, but is not evident in a review image, which is viewed alone. In any of these cases, the defect will be classified as “Not Found” or “SNV.”

SNV Type One: False events. As defined above, false events are a rare occurrence for today’s wafer inspection systems. Advances in signal processing algorithms, mechanical and electrical subsystems, and system integration have virtually eliminated false events. (False events are not to be confused with nuisance defects, which are defects arising from real, physical phenomena on the wafer—that defect engineers have designated as not affecting yield, performance or reliability. Examples of nuisance defects besides line-edge roughness might include particles that reside in open areas and bridges within dummy pattern. Nuisance defects can be culled from defects-of-interest (DOI) through multiple means, including choice of wavelength, aperture and polarization in the inspection recipe, and by various defect classification schemes post-detection. Nuisance defects like particles on open areas might be successfully re-detected by the e-beam review system, then binned or classified as nuisance, or they might be SNV, like line-edge roughness.)

SNV Type Two: Field-of-View Errors. For previous-generation inspection and review tools, insufficient coordinate accuracy often meant that the e-beam review tool had to search for each defect using a large field of view, then “zoom in” to image the defect with sufficient resolution to allow its classification. This strategy had two drawbacks: 1) it was very time-consuming, and thus limited the number of defects that could be reviewed on a wafer so that a statistically representative defect population was nearly impossible to attain; and 2) with a large FOV, the resolution of the image was too low to find the smallest critical defects. It didn’t matter that the ultimate resolution of the review tool was a couple of nanometers; if that resolution had to be compromised while the system was searching for defects, a significant number of defects would be missed. Defect engineers began to realize that, while resolution of the e-beam system is necessary for defect classification, the tool’s ultimate resolution is useful only if the defects of interest can be located reliably. 

Recent advances in stage accuracy on the wafer inspection and review tools, and improved communication between the tools, have now made it possible for e-beam review tools to drive directly to the location of the defect using a sub-micron field of view. The latest e-beam review tools can now reliably and efficiently locate the smallest yield-critical defects reported by the latest inspection systems and, without zooming in, image these defects for classification. This breakthrough has had a tremendous effect on the reduction of SNV counts, and the redistribution of these counts to appropriate defect classes (see Figure). Having a defect pareto that more accurately represents the defects on the wafer allows defect engineers to direct their efforts toward solving the most critical problems.

SNV Types 3 and 4: Previous-Layer Defects and Nuisance Variation. With the matter of false events out of the way, and having ensured that the review system is looking in the right place, we are left the problem of separating previous-layer defects—which truly should be SEM non-visual—from SNV nuisance, i.e. defects correctly imaged by the e-beam review tool but difficult to identify as defects from the review image. If the layer inspected is transparent to the wavelength band of the optical inspection tool, then the possibility that the defect is from the previous layer should be considered. In some cases the previous layer was also inspected, in which case defect source analysis (DSA) can be used to compare the locations of the previous layer’s results to those of the current layer. If the possibility of previous-layer defects has been ruled out, the expertise of the defect engineer is essential for determining the source of the “defect.” If it’s nuisance variation, it may be possible to hone the defect classification schemes to disposition nuisance variation defects into their own category in the defect pareto. Alternatively, the defect engineer may need to adjust the recipe of the inspection system to lower its capture rate for these SNV defects, through choice of a different aperture, wavelength band or polarization mode.

Why does it matter that the SNV defects are properly categorized? Defect engineers act on the information given by the defect pareto, and a high SNV count can disguise or hide real problems. For example, some of these mysterious, disappearing defects may be important DOI lying just outside the field of view of a previous-generation review tool. A misleading defect pareto can result in a delay in getting a new process to yield, or even a delay in getting a new chip to market. Using every means possible to ensure that the defect pareto properly represents the defects on the wafer—especially those defects that affect device yield, performance or reliability—gives fabs the best chance to bring their products to market profitably and on time.

Rebecca Howland, Ph.D., is a senior director in the corporate group and Christina Wang is a senior product marketing manager in the e-beam technology division at KLA-Tencor.

Check out other Process Watch articles: “The Dangerous Disappearing Defect,” “Skewing the Defect Pareto,” “Bigger and Better Wafers,” “Taming the Overlay Beast,” “A Clean, Well-Lighted Reticle,” “Breaking Parametric Correlation,” “Cycle Time’s Paradoxical Relationship to Yield,” and “The Gleam of Well-Polished Sapphire.”


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *


KLA-Tencor announces new defect inspection systems
07/12/2018KLA-Tencor Corporation announced two new defect inspection products at SEMICON West this week, addressing two key challenges in tool and process monit...
3D-Micromac unveils laser-based high-volume sample preparation solution for semiconductor failure analysis
07/09/2018microPREP 2.0 provides order of magnitude time and cost savings compared to traditional sample...
Leak check semiconductor process chambers quickly and reliably
02/08/2018INFICON,a manufacturer of leak test equipment, introduced the UL3000 Fab leak detector for semiconductor manufacturing maintenance teams t...