A Tohoku University paper is a good example of the benefits that can be gained when circuit design and process technology are viewed holistically.
Illustration (a) – A conventional CMOS logic chip has to rely on global interconnects between logic gates and volatile memory modules to shuttle data back and forth. The lengthy interconnects degrade the overall chip performance, while the volatile memory consumes stand-by power continuously.
Illustration (b) – By contrast, Tohoku researchers will discuss a 3D architecture that uses nonvolatile magnetic tunnel junctions (MTJs) as memory elements to improve the speed and reliability of large-scale CMOS logic ICs, while saving power. MTJs are high-speed, high-density nonvolatile devices. The researchers integrated them with CMOS logic in a 3D stack fashion.
They call their circuit architecture “nonvolatile logic-in-memory technology,” and they demonstrated it by building a nonvolatile field programmable gate array (FPGA), a ternary CAM (TCAM) memory and a microcontroller. Because the lengthy global interconnects between logic and memory were eliminated, and because MTJs are fast and nonvolatile, the technology may be suitable for ultra-fast, ultra-low power applications.
(Paper #28.2, “Challenge of MOS/MTJ-Hybrid Nonvolatile Logic-in-Memory Architecture in Dark-Silicon Era,” T. Hanyu et al, Tohoku University)