Applied Materials, Inc. today announced its Applied Endura Cirrus HTX PVD system with breakthrough technology for patterning copper interconnects at 10nm and beyond. As chip features continue to shrink, innovations in hardmask are required to preserve the pattern integrity of tightly packed, tiny interconnect structures.With the introduction of this technology, Applied enables scaling of the TiN metal hardmask – the industry’s material of choice – to meet the patterning needs of copper interconnects in advanced microchips.
“Precision engineering of metal hardmask films is key to addressing the patterning challenges for advanced interconnects,” said Dr. Sundar Ramamurthy, vice president and general manager of Applied’s Metal Deposition Products business unit. “The Cirrus HTX TiN product represents Applied’s decades of expertise in applying PVD technology for engineering TiN film properties. Incorporating our unique VHF-based technology offers customers the flexibility of tuning stress in TiN films from compressive to tensile to overcome their specific integration challenges.”
Today’s advanced microchips can pack 20 kilometers of copper wiring in a 100 square millimeter area, stacked in 10 layers with up to 10 billion vias or vertical connections between layers. The role of the metal hardmask is to preserve the integrity of these patterned lines and vias in soft ULK dielectrics. However, with scaling, the compressive stress from conventional TiN hardmask layers can cause the narrow lines patterned in ULK films to deform or collapse. The tunable Cirrus HTX TiN hardmask with high etch selectivity delivers superior CD line width control and via overlay alignment resulting in yield improvement.
This breakthrough in TiN hardmask is made possible by precision materials engineering at the wafer level to produce a high density, low-stress film. Combining exceptional film thickness uniformity with low defectivity on a proven Endura platform, the Cirrus HTX system addresses the stringent high volume manufacturing needs of patterning multiple interconnect layers.