Flip chip technology supported by wider adoption of Cu pillar tech

Flip Chip technology is expected to reach $25 billion market value and wafer demand of 32 million (12” eq. wafers) in 2020, supported by the wider adoption of Cu pillar technology. That growth will be led by Moore’s law pushing beyond the 28nm node and “More than Moore” evolution in next generation DDR and 3DICs.

flipchip_marketfigures_yole_oct2015_433x280The “More than Moore” market research and strategy consulting company Yole Développement’s (Yole) new analysis is entitled Flip Chip Technologies & Markets Trends (October 2015, Yole Développement). In this new report, Yole proposes a deep-added value analysis of the Flip Chip markets, players’ dynamics, and key trends. The consulting company highlights the key market figures and presents future Flip Chip strategy evolution and opportunities. Strongly linked to the Cu pillar technology, Flip Chip solutions have been largely adopted towards the mobile-wireless, consumer and computing applications, including continuous growth in the LED and CMOS Image Sensor (CIS) segments.

“Flip Chip assembly technology provides various benefits such as high I/O counts, fine pitch interconnection, and superior electrical and thermal performance,” explains Thibault Buisson, Technology & Market Analyst, Advanced Packaging at Yole. And he adds: “This drives its application across specific segments.”

The maximum growth in flip-chip bumping capacity will come from Cu pillars, driven by the finer pitches, higher I/O counts, lithography nodes below 28nm, emergence of 2.5D/3D packaging, increased current density and thermal dissipation needs. In the meantime lead-free solder bumping is expected to grow at just 2% CAGR as OSATs and foundries converting their existing solder bumping lines to Cu pillar lines. With the scaling of the Flip Chip pitch, OSATs are presently pushing the envelope of C2 mass reflow bonding with capillary underfill to pitches as low as 50µm by formulating engineered materials and improving assembly processes. However, if the pitch reaches or falls below 40µm Thermo Compression Bonding (TCB) will be the key option because of its high placement accuracy.

TCB will be adopted first in high volume manufacturing by IDMs like Intel, who can bear the high cost of ownership, followed by memory suppliers for their next generation memories based on through-silicon via technology.

“Intel has recently qualified ASM’s high throughput TCB bonder for assembly of 14nm chips for their CPUs in applications such as data centers, servers, and high-end computing”, comments Santosh Kumar, Senior Technology & Market Analyst, Advanced Packaging at Yole. And he adds: “At Yole, we estimate Flip Chip bonders’ total market value will reach US$435 million in 2020, with a CAGR of 7%. Flip Chip bonders and underfill materials will become key in coming years.”

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

NEW PRODUCTS

Introducing Semiconductor Digest
04/30/2019Semiconductor Digest is a new magazine dedicated to the worldwide semiconductor industry...
KLA-Tencor announces new defect inspection systems
07/12/2018KLA-Tencor Corporation announced two new defect inspection products at SEMICON West this week, addressing two key challenges in tool and process monit...
3D-Micromac unveils laser-based high-volume sample preparation solution for semiconductor failure analysis
07/09/2018microPREP 2.0 provides order of magnitude time and cost savings compared to traditional sample...