Leti and partners announce developments on three mature platforms

CEA-Leti and its partners in the European FP7 project PLAT4M today announced they have built three silicon photonics platforms. The four-year project, which launched in 2013, aims at building a European-based supply chain in silicon photonics and speeding industrialization of the technology. PLAT4M, which is funded by a European Commission grant of 10.2 million euros, includes 15 leading European R&D institutes and CMOS companies, key industrial and research organizations in design and packaging, as well as end users in different application fields, to build the complete supply chain.

Midway through the project, the consortium has developed advanced technologies and tools by building a coherent design flow, demonstrating manufacturability of elementary devices and process integration, and developing a packaging toolkit. The supply chain is based on technology platforms of Leti, imec and STMicroelectronics, supported by a unified design environment. The high level of maturity of the technology offered by these platforms makes them readily accessible to a broad circle of users in a fabless model.

Imec’s silicon photonics platform, based on 200mm substrates, has matured thanks to the PLAT4M project. The platform is based on SOI substrates with 220nm crystalline silicon on a 2,000nm buried oxide. During this project the existing fabrication processes and integration flow have been fine tuned to have stable and repeatable performance for all photonics building blocks (couplers, waveguides, phase shifters, photodetectors). This feeds the process design kit’s robust performance specifications and guarantees quality and first-time-right designs for the platform’s fabless users for high data-rate telecom and non-telecom applications. PLAT4M partners Thales, Polytec and TNO already are using the technology.

Beyond the 200mm platform, imec has pushed the limits of silicon photonics, exploiting advanced optical lithography with its 193nm immersion lithography scanner. It also has demonstrated very low propagation loss (~0.6dB/cm) for fully etched waveguides with excellent within-wafer linewidth control (standard deviation

Using the imec platform, Thales demonstrated a coherent combination of laser beams (CBC). Ultimately, this application aims at producing high-power, high-energy laser sources for sensing, industry or fundamental physics. The CBC rationale is to push the limits of single laser emitters (typically fiber amplifiers) by using a large number of amplifiers and coherently adding the output beams. The coherent addition requires locking the phase of all the amplifying channels. With the number of channels, potentially very large (from tens to thousands), an integrated technology is a major concern in terms of possible industrial products. The first generation CBC demonstrator of PLAT4M, which was packaged by Tyndall UCC, included a one-to-16 channel splitter tree, plus 16 independent thermal phase modulators. The CBC experiment showed the successful coherent addition of 16 laser beams at 1.55µm.

cea-leti supply chain

Leti has developed a new photonic platform based on 200mm SOI wafers. This process offers multilevel silicon patterning that allows the design of various passive and active devices (e.g. modulator and photodiode) with thermal tuning capability. Two AlCu levels are available for routing. A process design kit (PDK) is available for circuit design and an MPW service will be proposed in 2016. State-of-the-art performances have been demonstrated: insertion losses are below 2dB/cm for monomode waveguide and below 0.2dB/cm for multimode devices. Germanium photodiode responsivity is > 0.75A/W for a bandwidth >30GHz. Mach-Zehnder modulator VpLp is in the 2V.cm range for 2V operation with an E/O bandwidth > 25GHz. Moreover, Leti and III-V Lab have developed integrated hybrid III-V lasers and electro-absorption modulators (EAM) on silicon using a wafer-bonding technique. The hybrid lasers operate in the single-mode regime and the EAMs exhibit an extinction ratio higher than 20 dB with a drive voltage lower than 2V. Clear eye diagram has been achieved at a bit-rate of 25 Gb/s, confirming strong potential for telecom applications.

During the project, ST developed an additional silicon-photonic platform in 300mm technology to be used as an R&D tool for proof-of-concept purposes. The technology, called DAPHNE (Datacom Advanced PHotonic Nanoscale Environment), is designed for evaluating new devices and subsystems for demonstration. DAPHNE is a flexible platform that perfectly fits R&D needs. While developing it, ST demonstrated wavelength-division-multiplexing solutions using arrayed waveguide gratings, echelle gratings, cascaded Mach-Zehnder interferometers and side-coupled integrated spaced sequence of resonators. Some of the configurations are designed for the 100GBase-LR4 standard, and the experimental characterization results show insertion losses below 0.5dB and channel cross-talks above 25dB for a band flatness of 2nm. Furthermore, proper operation of receiver-and-transmitter blocks to be interfaced to optical devices above them has been demonstrated at 28Gbps, making use of 65nm-node technologies.

The PLAT4M WP2 work has led to a qualitative leap of the design flow for silicon photonics, allowing the photonics community to design more complex and more robust circuits. The electronics OpenAccess standard for data sharing between design-automation tools includes an extension for silicon photonics in a beta phase today. Simulation capabilities were leveraged thanks to an extensive characterization effort from the three partner fabs and thanks to the statistical data gathered for variability prediction. Paris-Sud University has studied theoretically the behavior of different phase shifters and photodetectors for a time-efficient and precise modeling. Mentor Graphics and PhoeniX Software partners have improved phase-aware routing and tool interoperability. Verification and manufacturability have reached industry-requirement standards thanks to the development of new techniques based upon the Mentor Graphics Calibre platform that delivers layout-versus-schematic comparison (Calibre nmLVS), photonic rule checks (PRC) and curvilinear-aware design-rule checks (Calibre nmDRC). Mask preparation is also improving with better pattern-density control and mask correction.


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