BiTS: The ever-shrinking package underscores emerging challenges and solutions

By Ira Feldman, general chair, BiTS 

What’s the single area that is being most disrupted by emergent technologies like the Internet of Things (or the Internet of Vehicles) and Silicon Photonics? We think it’s packaging. The cost and size constraints of these pervasive devices is driving ever more “shrink” – and innovation in the area of packaging – in order to deliver their benefits to every aspect of our daily lives. From fancy pedometers that are auditing our every step to all the data centers that are required to host the big data that is being created … ICs are at the core of the transformation and the test and packaging of these devices is incrementally more challenging.

“Silicon Photonics manufacturing has evolved to the point where it is now possible to manufacture a silicon photonics die using a standard CMOS manufacturing line. But, one challenge remained unsolved: how to test these applications at wafer level in a volume production environment,” said Jose Moreira, senior staff engineer at Advantest. “Working in conjunction with Tokyo Electron Labs and STMicroelectronics, a test cell implementation for testing mixed digital and silicon photonics ICs has been devised. In our Burn-In and Test Strategies (BiTS) Workshop presentation, we will review a solution for a high volume test cell for an OSAT environment.”

bits 2 bits

Now in its 17th year, BiTS offers a full technical program that spans four days including sessions on MEMS test, WLCSP test, Test Cell Integration, simulation & modeling, materials, and more. This year’s Tutorial is a practicum on the theory and statistics that underlie Adaptive Test to include test time reduction and outlier detection. The BiTS EXPO showcases the latest in test cell hardware, services, and consumables including sockets, load boards, contactors, materials, and more. BiTS has plenty of time for networking, great food, and warm weather! Attend the Burn-In and Test Strategies (BiTS) Workshop (March 6-9) in Mesa, Arizona. SEMI has arranged a special discount of $50 off registration when using the code of 50SEM.


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