ByÂ Dr. Phil Garrou, Contributing Editor
China targets GlobalFoundries
In IFTLE 238, we noted that China was the â€świld cardâ€ť when it came to global microelectronics consolidation – with plenty of cash and the government behind them. [link]
Chinaâ€™s National IC Investment Fund, Hua Capital Management, has reportedly approached GlobalFoundries, through an investment bank. Such an acquisition would allow China to secure 14nm FinFET foundry process technology [link 1]. GlobalFoundriesâ€™ 14nm process is licensed from Samsung [link 2].
Acquisition of GlobalFoundries would enable SMIC to enter volume production of 14nm FinFET products much earlier than originally planned. SMIC began volume production of 28nm chips in cooperation with Qualcomm and has signed an agreement with Qualcomm, IMEC and Huawei to develop 14nm process with volume production slated for 2020.
Abu Dhabiâ€™s Advanced Technology Investment (ATIC), a major shareholder of GlobalFoundries, is reported to be willing to sell its interest in GF.
In July, Chinaâ€™s Tsinghua Unigroup put a bid in to acquire Micron. On the packaging front, in the last year, Chinese companies have purchased bumping house FCI in Phoenix and the #4 global assembly house STATSChipPAC.
Tessera to Acquire Ziptronix
Tessera Technologies announced the acquisition of Ziptronix for $39 MM [link].
Founded in 2000 as a venture-backed spinoff of RTI International, Ziptronix is a pioneer in the development of low-temperature direct bonding technology for 3D integration.
Ziptronixâ€™s patented ZiBond direct bonding and DBI hybrid bonding technologies. Ziptronix has commercially licensed their ZiBond and/or DBI technologies to Sony Corporation for volume production of CMOS image sensors, to Raytheon and to Tezzaron / Novati.
In 2013, Ziptronix announced an agreement with Tezzaron and Novati Technologies, a wholly owned subsidiary of Tezzaron, selling its 3D IC development lab in Morrisville NC to Tezzaron, to be operated by Novati [link].
Tezzaron Announce 8 Layer 3DIC
At the IEEE 3DIC conference in Japan, Tezzaron and their manufacturing subsidiary, Novati announce the worldâ€™s first eight-layer 3D IC wafer stack containing active logic. Claiming â€śâ€¦the transistor and interconnect densities per cubic mm are far higher than achievable with 2D 14nm silicon fabrication.â€ť
Each wafer has 10 layers of copper interconnect supporting high performance CMOS logic â€“ a total of 80 layers of interconnect and 8 layers of transistors in a finished stack as thin as a single conventional die. Tezzaronâ€™s 8-wafer stack contains active CMOS circuitry and tungsten vertical interconnect. Wafers are 20Âµm thick; SuperContacts are 1.2Âµm diameter, 6Âµm deep, and can be deployed at a pitch of 2.4Âµm. There are no wire bonds, copper pillars, bumps, or underfill between the layers. The wafers were bonded with DBI technology, invented by Ziptronix and now available from Tessera. (see discussion above)
For all the latest in 3DIC and advanced packaging, stay linked to IFTLEâ€¦
There was a typo in the original photo caption (sorry) and it got copied into your article: the wafers are each 20um thick, not 20cm.
Thanks for the headâ€™s up, Gretchen. This has been fixed.
“Wafers are 20 cm thick” must be a typographical error. Judging from the photo, the wafers are about 20 microns thick…