ASIC Design Services adds Core Deep Learning IP to SiFive DesignShare program

SiFive, a provider of commercial RISC-V processor IP, today announced that ASIC Design Services, a design house, IP provider, and a distributor for FPGA and EDA software, has joined the DesignShare ecosystem. Through this partnership, ASIC Design Services will provide its Core Deep Learning (CDL) technology that accelerates Convolutional Neural Networks (CNNs) on power-constrained embedded hardware platforms.

ASIC Design Services’ CDL technology optimizes its CNN accelerator FPGA core for performance, logic resources, and low power – making CDL suitable for IoT edge and node applications. The CDL Coldbrew software stack performs quantization and compression of CNNs, design space exploration, and generates a solution optimized for performance, resources, and low power. Coldbrew is built on the Caffe deep learning framework, and provides a simple user interface to bridge the gap between high-level CNN specification and FPGA design.

“We are excited about the increased performance and energy efficiency offered by FPGAs,” said Tony Dal Maso, CEO of ASIC Design Services. “Today, we can achieve 100 Gops/s/Watt on a low-power FPGA solution. By partnering with SiFive we enable the global community of embedded designers to accelerate deep learning solutions on embedded platforms.”

The availability of ASIC Design Services’ CDL IP through the DesignShare program shortens the time to market and removes common barriers to entry that have traditionally prevented smaller companies from developing custom silicon. Companies like SiFive, ASIC Design Services and other DesignShare partners provide low- or no-cost IP to emerging companies, minimizing the upfront engineering costs needed to bring a custom chip from design to realization.

“Adding artificial intelligence and neural networks to edge devices is increasingly in demand,” said Shafy Eltoukhy, vice president of operations and head of DesignShare for SiFive. “With ASIC Design Services addition to the DesignShare ecosystem, we continue to expand the range of IP available to designers looking to bring prototype devices to life.”

Since DesignShare launched in 2017, the program has grown to include a wide range of IP solutions, from complete ASIC solutions and trace technology to embedded memory and precision PLL. For more information on DesignShare and to see the complete list of available technologies, visit www.sifive.com/designshare.

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